Effect of Annealing Atmosphere on Void Formation in Copper Interconnects

Abstract

In order to understand the void formation mechanism in electroplated Cu interconnects used in Si-semiconductor devices, microstructure of Cu/CuO/Cu layered films which were prepared on the Si 3 N 4 /Si substrates by the sputter-deposition technique was observed by transmission electron microscopy (TEM) and scanning ion microscopy (SIM). A high density of macro and micro voids were observed in the samples annealed in atmosphere containing hydrogen, whereas no voids were observed in the samples annealed in Ar atmosphere. TEM observation suggested that a small amount of oxygen contained in the Cu films (even a native oxide layer) formed water vapor at elevated temperatures, causing formation of the micro-voids when the samples were annealed in hydrogen atmosphere. The present result suggested that the void formation in the electroplated Cu films was induced by existence of impurities such as oxygen in the Cu films, and that the void growth was strongly enhanced by annealing in hydrogen atmosphere.

Thermal stability of pulse electroplated gold films: SEM-EBSD studies

“…The hydrogen gas evolution from the gold and gold alloy electrodeposits upon annealing at different temperatures is explained in detail elsewhere [25]. The similar type of bubbles/swellings formation in the deposit surface is also observed in Cu interconnects prepared by sputtering after annealing at 400ºC in H 2 /N 2 gas atmosphere [26]. From EBSD data of average grain size, it is confirmed that the average grain size increases from 6 μm to 7 μm on annealing of an as-deposited film at 850ºC for 3 days that indicates onset of grain growth.…”

“…The earlier study also reported that the void formation on the surface of the sputtered Cu deposit with increasing annealing temperature carried out in H 2 /N 2 gas atmosphere due to high internal pressure stored in the bubbles or swellings [26]. The formation of cracks along the grain boundaries of the swellings are also noticed which is similar to that observed in Cu deposits as well as in hydrogen embrittled bulk Cu materials reported in the previous studies [26,28]. The average grain size increases from 9 μm to 17 μm upon annealing of the as-deposited film from 900ºC to 910ºC for 5 hours.…”

“…The leveling of the sharp peaks and edges of the individual grains is noticed from the SEM analysis of the gold films annealed at temperatures higher than 400ºC but 200ºC is the starting temperature [27]. The earlier study also reported that the void formation on the surface of the sputtered Cu deposit with increasing annealing temperature carried out in H 2 /N 2 gas atmosphere due to high internal pressure stored in the bubbles or swellings [26]. The formation of cracks along the grain boundaries of the swellings are also noticed which is similar to that observed in Cu deposits as well as in hydrogen embrittled bulk Cu materials reported in the previous studies [26,28].…”

Influence of Minimum Barrier Metal Thickness at Trenches on Void Formation in 50-nm-wide Cu Wiring

“…Hence, many investigations to reduce oxidation of Cu seeds layers have been done to prevent void formation in the trenches during electroplating. [9][10][11] For example, the void occurrence rate as a function of the thickness of oxide layer, i.e., holding time after Cu deposition have been investigated and holding time limit has been fixed to reduce void formation in the electroplating process in each manufacturing facilities for practical use. [9][10][11] For barrier metals, it is clearly shown that the thicknesses of barrier metal layers in the trench must be reduced with decreasing interconnect dimension in order to reduce resistivity of Cu wires.…”

“…[9][10][11] For example, the void occurrence rate as a function of the thickness of oxide layer, i.e., holding time after Cu deposition have been investigated and holding time limit has been fixed to reduce void formation in the electroplating process in each manufacturing facilities for practical use. [9][10][11] For barrier metals, it is clearly shown that the thicknesses of barrier metal layers in the trench must be reduced with decreasing interconnect dimension in order to reduce resistivity of Cu wires. 12 Barrier metal thickness at the trench is estimated to have a substantial effect on the void formation, because Cu seed layer would not be formed on the defects or voids of barrier metals during sputter deposition leading to the void formation at the trench in the Cu electroplating process.…”