Effect of gate bias on channel in depletion-all-around operation of the SOI four-gate transistor

Jahangir, Shafat; Khosru, Quazi D. M.; Haque, Anisul

doi:10.1109/icece.2008.4769350

Cited by 7 publications

(2 citation statements)

References 13 publications

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“…Saeed et al [12] proposed an analytical model to calculate gate capacitance and drain current of GAA nanowire MOSFET with group III-V channel [13]. S. Jahangir et al [14], [15] have shown a numerical model which was developed to obtain the potential distribution [16], [17] solving 2-D Poisson equation in Depletion-All-Around (DAA) operation of n-channel Silicon-On-Insulator (SOI) G 4 -FET. Ballistic current-voltage model in DAA was also shown in [18].…”

Section: Introductionmentioning

confidence: 99%

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Alam¹,

Pathan²,

Rahman³

2018

International Journal of Innovative Research in Electrical, Ele

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Potential distribution and Wave function distribution are obtained by solving 2-D Poisson-Schrödinger equation using COMSOL with MATLAB. Conduction band profile and carrier density are investigated. Drain current of Graphene Channel Four Gate Transistor (G 4 -FET) and Gate-All-Around (GAA) MOSFET are calculated and compared. CONCLUSIONThe potential distribution and Wave function distribution for n-Graphene channel G 4 -FET and GAA MOSFET have been obtained by solving 2-D Poisson-Schrödinger equation using COMSOL with MATLAB. The maximum potential of G 4 -FET and GAA MOSFET has been compared. Conduction band profile and carrier density has been investigated. Drain current of n-Graphene channel G 4 -FET and GAA MOSFET has been calculated and compared with n-Silicon channel G 4 -FET. In the future, transconductance, threshold voltage, Sub-threshold Swing (SS), Drain Induced Barrier Lowering (DIBL), on-off current ratio will be calculated for those structures.

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Section: Introductionmentioning

confidence: 99%

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Alam¹,

Pathan²,

Rahman³

2018

International Journal of Innovative Research in Electrical, Ele

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“…Gateall-around devices can improve device performances significantly because of tighter control of gate over channel potential, device operation within quantum capacitance limit, sufficient drive current from an intrinsic channel, etc (2). Carbon nanotube FET, nanowire FET (3)(4)(5)(6), four gate transistor (G4 FET) (7,8) and FinFET (9,10) are some novel devices that has gone through lots of studies recently.…”

Section: Introductionmentioning

confidence: 99%

Modeling and Simulation of High-κ Gate GaSb Nanowire Field Effect Transistor for Ultra High Speed and Low Power Applications

Jahangir

Khosru

2011

ECS Trans.

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In this work, we have presented a numerical model for calculating drain current, gate capacitance, gate leakage current and several other important metrics of GaSb nanowire field effect transistor (NWFET). A 2-D simulator is used to calculate gate capacitance, surface potential, charge profile and direct tunneling gate leakage current under different gate biases. Drain current is simulated using a 3-D simulator based on mode-space approach. Dependence of drain current on several device parameters like film thickness, gate length and source/drain Fermi level is also investigated. Gate delay, power-delay and energy-delay products are calculated to show these devices' applicability in ultra high speed and low power applications. To investigate the effects of using ternary alloys of GaSb and InSb, the same metrics are also calculated for GaxIn1-xSb NWFET.

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A numerical model for solving two dimensional Poisson-Schrödinger equation in depletion all around operation of the SOI four gate transistor

Jahangir

Khosru

2009

2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)

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Effect of gate bias on channel in depletion-all-around operation of the SOI four-gate transistor

Cited by 7 publications

References 13 publications

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Modeling and Simulation of High-κ Gate GaSb Nanowire Field Effect Transistor for Ultra High Speed and Low Power Applications

A numerical model for solving two dimensional Poisson-Schrödinger equation in depletion all around operation of the SOI four gate transistor

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Effect of gate bias on channel in depletion-all-around operation of the SOI four-gate transistor

Cited by 7 publications

References 13 publications

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Drain Current Model of Graphene Channel G 4 -FET and Gate-All-Around MOSFET

Modeling and Simulation of High-κ Gate GaSb Nanowire Field Effect Transistor for Ultra High Speed and Low Power Applications

A numerical model for solving two dimensional Poisson-Schr&#x00F6;dinger equation in depletion all around operation of the SOI four gate transistor

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A numerical model for solving two dimensional Poisson-Schrödinger equation in depletion all around operation of the SOI four gate transistor