Effective system and performance benchmarking for reconfigurable computers

Esmail, C.; Tarek, E.-G.; Kris, Gaj; Nikitas, A.; Dan, P.

doi:10.1109/fpt.2004.1393323

Cited by 1 publication

(1 citation statement)

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“…The main feature of the reconfigurable computing [2] is in the system using FPGA device, and allows the system to obtain the ability to reconfigure [3]. Through the reconstruction realize the modification of hardware's logic function, so as to accelerate the speed of data processing [4][5], enhance the system's fault tolerant, and let the system to adapt to various application environments.…”

Section: Introductionmentioning

confidence: 99%

Design of FPGA-Based Fault-Tolerant Embedded System

Xiong

Wang

Zeng

2012

AMR

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Fault tolerant is one of major requirements for embedded systems. As the embedded systems become more and more complex, more chances for various fault. When design embedded system developer has to handle these faults. Before handling faults designer has to identify and understand the types and nature of faults.Faults is the sources for low dependability, faults can be hardware and software. Hardware faults can be distinguished from systematic faults like software or design errors. The Fault can be deleted, such as extensive testing or formal verification and tolerated by fault tolerance techniques. We restrict ourselves to the problem of fault tolerance and refer to other methods for troubleshooting.This paper discusses a new design method about the fault tolerant system of embedded system. We designed a fault tolerant system of data acquisition system in dynamically re-configurable FPGA. The experiment results show that the system not only be able to higher self-adaptive ability and reliability, but also can Through the FGPA to complete a specific algorithm.

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Section: Introductionmentioning

confidence: 99%