2007 Proceedings 57th Electronic Components and Technology Conference 2007
DOI: 10.1109/ectc.2007.373881
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Effects of Organic Package Warpage on Microprocessor Thermal Performance

Abstract: Efficient heat dissipation is a major challenge for the packaging of high power microprocessors. This paper discusses a novel lid assembly process and characterization techniques that were successfully developed for a high power microprocessor in high volume production. For a high power microprocessor flip chip organic package with underfill, die warpage as a result of CTE mismatch between the silicon and organic substrate is a challenge. A laser-based surface profiling technique was used to characterize the d… Show more

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Cited by 8 publications
(4 citation statements)
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“…In addition, the material behaviours generally deviate from those of their generic counterparts as the result of their physical or metallurgical interconnection to neighbouring materials [23]. As such, relevant laws governing these behaviours are complex to prescribe [24]; related parameters are difficult to determine for a specific application [25], and book values of the properties as published, show wide ranges of variation [6,26].…”
Section: Adhesive Layermentioning
confidence: 99%
“…In addition, the material behaviours generally deviate from those of their generic counterparts as the result of their physical or metallurgical interconnection to neighbouring materials [23]. As such, relevant laws governing these behaviours are complex to prescribe [24]; related parameters are difficult to determine for a specific application [25], and book values of the properties as published, show wide ranges of variation [6,26].…”
Section: Adhesive Layermentioning
confidence: 99%
“…The seal adhesive and TIM are cured in the same reflow step. The end-of-line package is still warped although the magnitude is much less compared with that immediately after underfill reflow [2].…”
Section: Introductionmentioning
confidence: 97%
“…Too et al [2] pointed out that the conductive particles in the TIM have better chance to make contact with the silicon and/or lid surfaces at the chip center under compression than at the chip corners as the local Z-direction stress is tensile. This would cause different local thermal resistances at different portions of the chip.…”
Section: Introductionmentioning
confidence: 99%
“…The second package in Fig. 1(b) uses a lid-attach seal material to attach the lid to the chip carrier and can use a lowstructural strength TIM [5]. The third package in Fig.…”
Section: Introductionmentioning
confidence: 98%