Effects of Surface Roughness and Copper Contamination on the Oxide Breakdown of Silicon Wafer

Abstract

Surface roughness of silicon wafer was increased by the immersion in NH 4 OH solution. And copper contamination was applied to rough surface. Current-voltage characteristics were measured on 12 nm oxide. The rates of dielectric breakdown were increased consistently following the increase of roughness and copper contamination. In Fowler-Nordheim tunneling regime, abnormal current variations such as shift and hump were observed. By the tunneling current analysis, each contribution of roughness and copper contamination was related to two kinds of current variation. The shift of tunneling regime to lower electric field was induced by surface roughness via the increase of effective interface area. And the deformation in tunneling characteristics was attributed to copper contamination via the decrease of effective oxide thickness.