Efficient CNOT Synthesis for NISQ Devices

Yao, Takeshi

doi:10.48550/arxiv.2011.06760

Cited by 5 publications

(6 citation statements)

References 8 publications

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“…To reduce CNOT-count, Steiner trees have been used in [26,34,60,54], while in [11] the problem is reduced to a well-known cryptographic problem -the syndrome decoding problem.…”

Section: Related Workmentioning

confidence: 99%

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Gheorghiu¹,

Li²,

Mosca³

et al. 2022

Preprint

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While mapping a quantum circuit to the physical layer one has to consider the numerous constraints imposed by the underlying hardware architecture. Connectivity of the physical qubits is one such constraint that restricts two-qubit operations, such as CNOT, to ``connected'' qubits. SWAP gates can be used to place the logical qubits on admissible physical qubits, but they entail a significant increase in CNOT-count. In this paper we consider the problem of reducing the CNOT-count in Clifford+T circuits on connectivity constrained architectures, like noisy intermediate-scale quantum (NISQ) computing devices. We ``slice'' the circuit at the position of Hadamard gates and ``build'' the intermediate {CNOT,T} sub-circuits using Steiner trees, significantly improving on previous methods. We compared the performance of our algorithms while mapping different benchmark and random circuits to some well-known architectures such as 9-qubit square grid, 16-qubit square grid, Rigetti 16-qubit Aspen, 16-qubit IBM QX5 and 20-qubit IBM Tokyo. Our methods give less CNOT-count compared to Qiskit transpiler as well as using SWAP gates. Assuming most of the errors in a NISQ circuit implementation are due to CNOT errors, then our method would allow circuits with few times more CNOT gates be reliably implemented than the previous methods would permit.

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“…To reduce CNOT-count, Steiner trees have been used in [26,34,60,54], while in [11] the problem is reduced to a well-known cryptographic problem -the syndrome decoding problem.…”

Section: Related Workmentioning

confidence: 99%

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Gheorghiu¹,

Li²,

Mosca³

et al. 2022

Preprint

View full text Add to dashboard Cite

show abstract

“…Performing the synthesis of the phase polynomial p(x) and the linear reversible function g(x) amounts to constructing a circuit equivalent to C. The synthesis of linear reversible functions is a well studied problem as there exists asymptotically optimal methods [35], as well as efficient heuristic algorithms in both cases of partial and full connectivity [36,37]. For that reason we will put aside the problem of synthesizing the linear reversible function g(x), and we will focus on the phase polynomials synthesis problem.…”

Section: Phase Polynomials Synthesismentioning

confidence: 99%

Phase polynomials synthesis algorithms for NISQ architectures and beyond

Vivien¹,

Martiel²,

Brugière³

2021

Preprint

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We present a framework for the synthesis of phase polynomials that addresses both cases of full connectivity and partial connectivity for NISQ architectures. In most cases, our algorithms generate circuits with lower CNOT count and CNOT depth than the state of the art or have a significantly smaller running time for similar performances. We also provide methods that can be applied to our algorithms in order to trade an increase in the CNOT count for a decrease in execution time, thereby filling the gap between our algorithms and faster ones.

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“…With a similar goal of reducing the size of linear reversible CNOT circuits the authors in [dBBV + 20] reduced the problem to a wellknown cryptographic problem -the syndrome decoding problem. In [Tan20] the author achieves some improvement over [KdG19] for the synthesis of linear reversible circuits, by designing a qubit routing procedure that gives a different permutation of the output qubits.…”

Section: Related Workmentioning

confidence: 99%

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Gheorghiu¹,

Huang²,

Li³

et al. 2020

Preprint

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While mapping a quantum circuit to the physical layer one has to consider the numerous constraints imposed by the underlying hardware architecture. Connectivity of the physical qubits is one such constraint that restricts two-qubit operations such as CNOT to "connected" qubits. SWAP gates can be used to place the logical qubits on admissible physical qubits, but they entail a significant increase in CNOT-count, considering the fact that each SWAP gate can be implemented by 3 CNOT gates.In this paper we consider the problem of reducing the CNOT-count in Clifford+T circuits on connectivity constrained architectures such as noisy intermediate-scale quantum (NISQ) [Pre18] computing devices. We "slice" the circuit at the position of Hadamard gates and "build" the intermediate portions. We investigated two kinds of partitioning -(i) a simple method of partitioning the gates of the input circuit based on the locality of H gates and (ii) a second method of partitioning the phase polynomial of the input circuit. The intermediate {CNOT, T} subcircuits are synthesized using Steiner trees, significantly improving on the methods introduced by Nash, Gheorghiu, Mosca [NGM20] and Kissinger, de Griend [KdG19].We compared the performance of our algorithms while mapping different benchmark circuits as well as random circuits to some popular architectures such as 9-qubit square grid, 16-qubit square grid, Rigetti 16-qubit Aspen, 16-qubit IBM QX5 and 20-qubit IBM Tokyo. We found that for both the benchmark and random circuits our first algorithm that uses the simple slicing technique dramatically reduces the CNOT-count compared to naively using SWAP gates. Our second slice-and-build algorithm also performs very well for benchmark circuits.

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Efficient CNOT Synthesis for NISQ Devices

Cited by 5 publications

References 8 publications

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Phase polynomials synthesis algorithms for NISQ architectures and beyond

Reducing the CNOT count for Clifford+T circuits on NISQ architectures

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