Reducing the CNOT count for Clifford+T circuits on NISQ architectures

Abstract

While mapping a quantum circuit to the physical layer one has to consider the numerous constraints imposed by the underlying hardware architecture. Connectivity of the physical qubits is one such constraint that restricts two-qubit operations such as CNOT to "connected" qubits. SWAP gates can be used to place the logical qubits on admissible physical qubits, but they entail a significant increase in CNOT-count, considering the fact that each SWAP gate can be implemented by 3 CNOT gates.In this paper we consider the problem of reducing the CNOT-count in Clifford+T circuits on connectivity constrained architectures such as noisy intermediate-scale quantum (NISQ) [Pre18] computing devices. We "slice" the circuit at the position of Hadamard gates and "build" the intermediate portions. We investigated two kinds of partitioning -(i) a simple method of partitioning the gates of the input circuit based on the locality of H gates and (ii) a second method of partitioning the phase polynomial of the input circuit. The intermediate {CNOT, T} subcircuits are synthesized using Steiner trees, significantly improving on the methods introduced by Nash, Gheorghiu, Mosca [NGM20] and Kissinger, de Griend [KdG19].We compared the performance of our algorithms while mapping different benchmark circuits as well as random circuits to some popular architectures such as 9-qubit square grid, 16-qubit square grid, Rigetti 16-qubit Aspen, 16-qubit IBM QX5 and 20-qubit IBM Tokyo. We found that for both the benchmark and random circuits our first algorithm that uses the simple slicing technique dramatically reduces the CNOT-count compared to naively using SWAP gates. Our second slice-and-build algorithm also performs very well for benchmark circuits.

Best Approximate Quantum Compiling Problems

“…However, the three qubit identities do maintain the hardware connectivity constraints of the original circuit, so they can be used in all the cases. Note that there are recent works using Steiner trees to apply the synthesis algorithm in a way that does respect hardware connectivity: [20,25,34,50,71].…”

Dynamic qubit allocation and routing for constrained topologies by CNOT circuit re-synthesis

“…Additionally, if the CNOT synthesis is done as part of a slice-and-build approach where the circuit is cut into pieces (e.g. in [8]) the cost of keeping the logical qubits in the same qubit registers grows linearly with the number of slices.…”

“…Similarly, we can replace the Steiner-Gauss algorithm in [8] for synthesizing CNOTs, R z , and NOT gates. By also including the NOT gate in the synthesis procedure, it allows to synthesize the phase polynomial before and after the NOT gate to be synthesized in unison.…”

“…As a result, it will take much longer to execute a quantum circuit, and thus introduce more errors to the computation. Alternatively, a recent paradigm shift in routing strategies has introduced Steiner-tree based synthesis [2,11,15,14,21,8] as a tool for changing the circuit to fit the connectivity constraints of the quantum hardware. The intuition behind these techniques is that by lifting the rigid representation of the quantum circuit to a more flexible representation and then synthesizing a new circuit from the flexible representation, we can make global improvements to the circuit more easily.…”

“…The Steiner-Gauss algorithm provides the first Steiner-tree based synthesis approach and it is used to synthesize CNOT circuits [11,15]. Later, Steiner-tree based synthesis was also used for synthesizing CNOT and R z gates simultaneously [15,14,21], and even for simultaneous synthesis of CNOT, R z , and N OT gates leaving only the H gates to slice and build the circuit from [8].…”