Efficient compression and application of deterministic patterns in a logic BIST architecture

Abstract

We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern generator (ATPG) and are encoded as linear feedback shift register (LFSR) initial values (seeds); one or more patterns can be encoded into a single LFSR seed. During test application, seeds are loaded into the LFSR with no cycle overhead. The method presented achieves reductions of at least 100x in test data and 10x in tester cycles compared to deterministic ATPG while maintaining complete fault coverage, as confirmed by experimental results on industrial designs.

Capture-power-aware test data compression using selective encoding

“…As pointed out in [25], the above techniques have their own pros and cons: code-based schemes (e.g., [2][3][4][5][6][7][8][9][10][11][12]) can efficiently exploit correlations in the specified bits and do not require ATPG constraints, while lineardecompressor-based techniques and broadcasting-based techniques (e.g., [13][14][15][16][17][18][19][20][21][22][23][24]) generally provide greater compression ratio.…”

On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism

“…Test data compression methods, such as deterministic BIST (DBIST) [4], have been proposed by combining a linear-feedback shift register (LFSR) to reduce the volume of test stimuli patterns and a multiple-input signature register (MISR) for test response compaction. External automatic test equipment (ATE) is used to store the LFSR seeds and to compare the test response signatures with those from a known fault-free design.…”

Choosing the Right Mix of At-speed Structural Test Patterns: Comparisons in Pattern Volume Reduction and Fault Detection Efficiency

“…(iii) Several experimental results are presented on large representative SOC designs and conclusions drawn based on them. ATPG patterns and deterministic BIST (DBIST -from Synopsys Inc.) patterns, (based on periodic re-seeding [5]), are considered for these experiments. The emphasis is on pattern selection techniques, as against design methodologies to support at-speed pattern generation, which are relatively well known.…”