2012
DOI: 10.1587/elex.9.422
|View full text |Cite
|
Sign up to set email alerts
|

Efficient unsigned squarer design techniques

Abstract: Abstract:The partial product matrix (PPM) of a parallel squarer is symmetric. To reduce the depth of PPM, it can be folded, shifted and rearranged. In this paper, we present an efficient unsigned parallel squarer design technique. Also, a fixed-width squarer design method of the proposed squarer is presented. By simulations, it is shown that the proposed squarers lead to up to 18% reduction in area, 10% reduction in propagation delay and 10% reduction in power consumption compared with previous squarers. By us… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
4
0

Year Published

2013
2013
2018
2018

Publication Types

Select...
3

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
(4 citation statements)
references
References 8 publications
0
4
0
Order By: Relevance
“…2(b) can be obtained. In order to further reduce the partial product bits of squarers in [4], the addition of 1 − i i a a on column 2i and a i a i-2 and a i-1 a i-2 on column (2i-1), (where i = 2, … , W-1) in Fig. 2(b) can be simplified as…”
Section: Previous Unsigned and Two's Complement Squarermentioning
confidence: 99%
See 1 more Smart Citation
“…2(b) can be obtained. In order to further reduce the partial product bits of squarers in [4], the addition of 1 − i i a a on column 2i and a i a i-2 and a i-1 a i-2 on column (2i-1), (where i = 2, … , W-1) in Fig. 2(b) can be simplified as…”
Section: Previous Unsigned and Two's Complement Squarermentioning
confidence: 99%
“…The folding technique described in [1] uses the symmetry of the partial product matrix of squarer to achieve 50% reduction of the number of partial products compared with a standard multiplier. The partial products rearrangement techniques in [2,3,4] is used to reduce the total number of partial products bits and the depth of partial product matrix.…”
Section: Introductionmentioning
confidence: 99%
“…Most optimization schemes exploit the folding and merging techniques, which use x i + x i = 2x i and x i + x i x i−1 = 2x i x i−1 + x i x i−1 , respectively [2]. Figure 1 describes the use of the optimization techniques in a 4-bit unsigned integer squarer.…”
Section: Introductionmentioning
confidence: 99%
“…The high-radix techniques [4], [5] or signed-digit techniques [6] can be beneficial but require extra circuits to recode operands or convert representations. The designs with reduced precision, such as in [2], are also interesting but are not considered in the present study.…”
Section: Introductionmentioning
confidence: 99%