2003
DOI: 10.1016/s0921-5107(02)00731-6
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Electrical barrier properties of meso-porous silicon

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Cited by 24 publications
(17 citation statements)
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“…It can be seen that while the reference PS, the PS-Sol and the PS-PAN d-d samples have a rectification I-V characteristics similar to those found in reference [10], the incorporation of PAN into PS matrix (without de-doping) gives rise to a more symmetrical I-V characteristics where the reverse current (e.g., the positive electrode is connected to the top PS-PAN composite, see inset to Fig. 4b) increases by approximately 5 orders of magnitude.…”
Section: Number Of Cyclessupporting
confidence: 70%
“…It can be seen that while the reference PS, the PS-Sol and the PS-PAN d-d samples have a rectification I-V characteristics similar to those found in reference [10], the incorporation of PAN into PS matrix (without de-doping) gives rise to a more symmetrical I-V characteristics where the reverse current (e.g., the positive electrode is connected to the top PS-PAN composite, see inset to Fig. 4b) increases by approximately 5 orders of magnitude.…”
Section: Number Of Cyclessupporting
confidence: 70%
“…The effect of temperature on the current density-voltage (I-V) characteristic of metal contacts on PS films was observed in experiments (Pazebutas et al, 1995;Chen et al, 1994a;1994b;Remaki et al, 2003;Aroutiounian and Ghulinyan, 2003;Balagurov et al, 2001). Those authors proposed different mechanisms.…”
Section: Introductionmentioning
confidence: 99%
“…After a wetting step of the PS surface with an aqueous electrolyte (H 3 PO 4 , 0.005 M), a rectifying I(V) characteristic is observed for non silanized layer. This indicates a partial shunt of the porous impedance layer revealing a Shottky barrier with the metal electrodes [6]. In comparison, the high ohmic impedance of silanized samples is remaining after the wetting step of the PS surface.…”
Section: Resultsmentioning
confidence: 95%
“…To optimize the insulation capability of the PS layer, and according to the technological constraints, a thick porous layer (300 µm) was chosen. Furthermore, a previous work has shown that the PS breakdown field is about 10 kV.cm -1 [6]. Thus, the maximum voltage that may be applied to the structure was 600 V. As it has been noticed above for current distribution, the electric field will be divided among the channel (E C ) and the silicon substrate (local Ohm's law).…”
Section: Design Optimizationmentioning
confidence: 89%