Electrical Characteristics and Reliability of Multi-channel Polycrystalline Silicon Thin-Film Transistors

Shieh, Ming−Shan; Sang, Jen-Yi; Chen, Chih−Yang; Wang, Shen−De; Lei, Tan Fu

doi:10.1143/jjap.45.3159

Cited by 11 publications

(5 citation statements)

References 13 publications

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“…The enhanced output current with coverage could be mainly attributed to the increased number of NiO NWs between S/D electrodes. For the FETs based on polycrystalline NWs, the increased number of channel stripes can lower grain-boundary potential barriers, leading to the better gate control capability . Meanwhile, the threshold voltage ( V TH ) was observed to shift positively from −10.0 V to 18.2 V, which could be ascribed to the increased number of holes and the hole transport pathways .…”

Section: Results and Discussionmentioning

confidence: 99%

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Liu

Meng

Zhu

et al. 2017

ACS Appl. Mater. Interfaces

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One-dimensional metal-oxide nanowires are regarded as important building blocks in nanoscale electronics, because of their unique mechanical and electrical properties. In this work, p-type nickel oxide nanowires (NiO NWs) were fabricated by combining sol-gel and electrospinning processes. The poly(vinylpyrrolidone) (PVP) with a molecular weight of 1 300 000 was used as the polymer matrix to increase the viscosity of a NiO precursor solution. The formation and properties of the as-spun NiO/PVP composite NWs before/after calcination treatment were investigated using various techniques. Because of the enhanced adhesion properties between ultraviolet (UV)-treated NiO NWs and the substrate, the field-effect transistors (FETs) based on NiO NWs were found to exhibit satisfying p-channel behaviors. For the fabrication of aligned NiO NW arrays, two parallel conducting Si strips were grounded as NW collector. The integrated FETs based on aligned NiO NWs were demonstrated to exhibit superior electrical performance, compared to the disordered counterparts with the comparable NW coverage. By employing high- k aluminum oxide (AlO) as a dielectric layer, instead of conventional SiO, the devices with an aligned NiO NW array exhibit a high hole mobility of 2.8 cm/(V s) with a low operating voltage of 5 V, fast switching speed, and successful modulation of light emission over external light-emitting diodes. To the best of our knowledge, this is the first work demonstrating the low-voltage transistors based on p-type oxide NWs, which represents a great step toward the development of sensors and CMOS logic circuits.

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Section: Results and Discussionmentioning

confidence: 99%

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Liu

Meng

Zhu

et al. 2017

ACS Appl. Mater. Interfaces

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“…For FET devices with polycrystalline channels, an increase in the number of channel stripes results in an enhancement of the on-state current given that better gate control capability induces lower grain boundary potential barriers. 38 However, when channel coverage exceeded approximately 90%, the device characteristics were observed to sharply deteriorate. While the network channel layer showed a very high maximum oncurrent of 1.68 mA, it exhibited poor saturation behavior and low I on/off of 3.9 Â 10 3 at a V DS = 20 V. The deteriorated electrical properties, such as higher offcurrent, may have resulted from an increase in fiber network channel layer thickness.…”

Section: Resultsmentioning

confidence: 99%

“…The I on/off values were 1.05 × 10 5 , 1.1 × 10 5 , 1.9 × 10 6 , and 6.82 × 10 6 at V DS = 20 V, for FETs with 23, 44, 67, and 82% coverage, respectively. For FET devices with polycrystalline channels, an increase in the number of channel stripes results in an enhancement of the on-state current given that better gate control capability induces lower grain boundary potential barriers . However, when channel coverage exceeded approximately 90%, the device characteristics were observed to sharply deteriorate.…”

Section: Resultsmentioning

confidence: 99%

Low Voltage Operating Field Effect Transistors with Composite In₂O₃–ZnO–ZnGa₂O₄ Nanofiber Network as Active Channel Layer

et al. 2014

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Field effect transistors (FETs), incorporating metal-oxide nanofibers as the active conductive channel, have the potential for driving the widespread application of nanowire or nanofiber FETs-based electronics. Here we report on low voltage FETs with integrated electrospun In2O3-ZnO-ZnGa2O4 composite fiber channel layers and high-K dielectric (MgO)0.3-(Bi1.5Zn1.0Nb1.5O7)0.7 gate insulator and compare their performance against FETs utilizing conductive single phase, polycrystalline ZnO or In2O3 channel layers. The polycrystalline In2O3-ZnO-ZnGa2O4 composite fibers provide superior performance with high field effect mobility (∼7.04 cm2 V(-1) s(-1)), low subthreshold swing (390 mV/dec), and low threshold voltage (1.0 V) combined with excellent saturation, likely resulting from the effective blocking of high current-flow through the In2O3 and ZnO nanocrystallites by the insulating spinel ZnGa2O4 phase. The microstructural evolution of the individual In2O3, ZnO, and ZnGa2O4 phases in composite fibers is clearly observed by high resolution TEM. A systematic examination of channel area coverage, ranging from single fiber to over 90% coverage, demonstrates that low coverage results in relatively low current outputs and reduced reproducibility which we attribute to the difficulty in positioning fibers and fiber length control. On the other hand, those with ∼80% coverage exhibited high field effect mobility, high on/off current ratios (>10(5)), and negligible hysteresis following 15 sweep voltage cycles. A special feature of this work is the application of the FETs to modulate the properties of complex polycrystalline nanocomposite channels.

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“…8) For example, by adding side channels, the effective channel width of poly-Si TFTs can be increased by fabricating a gate electrode crossing the gate oxide and several poly-Si channels, which becomes more evident as the number of channels increases. 9) Furthermore, gate-all-around (GAA) poly-Si TFTs with multiple nanowire channels have been proposed and demonstrate excellent electrical characteristics but their reliability has not yet been sufficiently investigated. [10][11][12] Moreover, the OFF-state leakage current of GAA poly-Si TFTs increases more rapidly than that of conventional planar poly-Si TFTs as the gate voltage decreases for n-type devices.…”

Section: Introductionmentioning

confidence: 99%

Superior Reliability of Gate-All-Around Polycrystalline Silicon Thin-Film Transistors with Vacuum Cavities Next to Gate Oxide Edges

Liu¹,

Chiou²,

Huang

et al. 2011

Jpn. J. Appl. Phys.

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The electrical characteristics and reliability of n-type gate-all-around (GAA) polycrystalline silicon thin-film transistors (poly-Si TFTs) with vacuum cavities next to the gate oxide edges are investigated. This novel structure is successfully fabricated by spacer formation, partial wet etching of a gate oxide, and in situ vacuum encapsulation. The electrical characteristics of the GAA poly-Si TFTs with vacuum cavities are superior to those of traditional GAA poly-Si TFTs because the vacuum cavity serves as an offset region to decrease the leakage current in the OFF state and as a field-induced drain (FID) to sustain the on-current in the ON state. In addition, regardless of whether static or dynamic electrical stress is imposed on these devices, the GAA poly-Si TFTs with vacuum cavities exhibit superior reliability to traditional ones owing to the simultaneous reduction of vertical and lateral electric fields near the drain junction during bias stressing due to the greater equivalent gate oxide thickness on the gate electrode edges

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Electrical Characteristics and Reliability of Multi-channel Polycrystalline Silicon Thin-Film Transistors

Cited by 11 publications

References 13 publications

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Low Voltage Operating Field Effect Transistors with Composite In₂O₃–ZnO–ZnGa₂O₄ Nanofiber Network as Active Channel Layer

Superior Reliability of Gate-All-Around Polycrystalline Silicon Thin-Film Transistors with Vacuum Cavities Next to Gate Oxide Edges

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Electrical Characteristics and Reliability of Multi-channel Polycrystalline Silicon Thin-Film Transistors

Cited by 11 publications

References 13 publications

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors

Low Voltage Operating Field Effect Transistors with Composite In2O3–ZnO–ZnGa2O4 Nanofiber Network as Active Channel Layer

Superior Reliability of Gate-All-Around Polycrystalline Silicon Thin-Film Transistors with Vacuum Cavities Next to Gate Oxide Edges

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Low Voltage Operating Field Effect Transistors with Composite In₂O₃–ZnO–ZnGa₂O₄ Nanofiber Network as Active Channel Layer