Electrical Characteristics of HfO[sub 2] Dielectrics with Ru Metal Gate Electrodes

Abstract

Hafnium dioxide, HfO 2 , thin films were prepared by radio frequency magnetron sputtering of thin hafnium layers, followed by an oxidation process. Ru was deposited on the HfO 2 as the gate electrode. An equivalent oxide thickness of 12.5 Å was obtained in Ru/HfO 2 /n-Si metal oxide semiconductor ͑MOS͒ capacitor with a low leakage current density of 1.7 ϫ 10 −2 A/cm 2 at Vg − V FB = 1 V in accumulation. The work function of Ru gate extracted from capacitance-voltage analysis was 5.02 eV, suggesting Ru has the appropriate work function for p-MOSFETs. Using the conductance method, a high interface state density of 1.3 ϫ 10 13 eV −1 cm −2 from the conduction band edge to the near midgap of Si was obtained in Ru/HfO 2 /n-Si MOS, compared to low interface density level of ϳ10 11 eV −1 cm −2 in p + poly Si/SiO 2 /n-Si MOS. To evaluate the thermal stability, the samples were subjected to a rapid thermal anneal in an argon ambient up to 900°C. The electrical characteristics of Ru/HfO 2 /n-Si MOS capacitor are discussed in detail with post-metal annealing temperatures.

Band offsets of a ruthenium gate on ultrathin high-κoxide films on silicon

“…Also, in a subsequent work using a combination of electrical measurements and XPS, Ťapajna et al 20 report the possibility of oxidation of their MOCVD-grown Ru films upon deposition at 300°C. A better agreement for the CBO of HfO 2 with Ru is found in Suh et al, 21 where a 5.02 eV effective work function for Ru leads to a 2.5 eV CBO ͑using our experimental value of the electron affinity for HfO 2 ͒. A common difficulty in using electrical methods to determine band alignment is that a number of assumptions have to be made, from modeling the electrical response to the use of experimental values ͑energy gaps or electron affinities͒ obtained with different experimental techniques on slightly different samples.…”

“…High effective work functions have been determined for Ru on high-/ Si stacks by electrical characterization ͓capacitance-voltage ͑CV͒ and current-voltage ͑IV͔͒. [19][20][21][22] A commonly used method in determining band alignment of a metal gate with respect to an oxide substrate is to perform CV measurements on MOS stacks for varying oxide thicknesses. The determination of the flatband voltage V FB as a function of the oxide thickness, th ox , leads, by extrapolation to th ox = 0, to the metal gate effective work function M,eff :…”

“…The CBO between Ru and the different dielectrics, obtained using UPS and IPS, are in reasonable agreement with the available numbers in the literature. [19][20][21][22] For the Ru/high-/ SiO 2 / Si system, the MIGS model, where the CNL position is rescaled to an experimentally measured gap, gives a good description of the band alignment. These results are in contrast with what has been found for other metals such as Al, for which interfacial Al 2 O 3 layer has been shown to develop upon metallization of other high-stacks, thus preventing a simple use of the MIGS model.…”

Electron energy distribution in Si/TiN and Si/Ru hybrid floating gates with hafnium oxide based insulators for charge trapping memory devices

“…Detailed retention characteristics for the standard Si‐only FG and HFG stacks have already been published in (poly‐only FG and TiN x /Al 2 O 3 , 70 nm cells) and (TiN x /Hf 0.8 Al 0.2 O x /Al 2 O 3 /Hf 0.8 Al 0.2 O x , 30 nm cells). In short, as found for the optimized stack there, test at 85 °C of a HFG stack indicates that the retention is comparable to that of Si‐only FG.…”

Flatband voltage shift of ruthenium gated stacks and its link with the formation of a thin ruthenium oxide layer at the ruthenium/dielectric interface

“…The transformation of chemical environment in the stack and its link with the V fb shift is still not clear. Since Ru is an important candidate for p-type metal gate application due to its widely reported high WF, [23][24][25] it is important to understand its stability during thermal treatment in different ambient in detail ͑for example, metal gate will be exposed to O 2 during storage and pad-oxide formation process͒. By investigating the V fb shifts after O 2 anneal in detail, this behavior can also be useful to obtain suitable WF for pMOS.…”