Electrical characterization and analysis techniques for the high-κ era

Traps and trapping phenomena and their implications on electrical behavior of high-k capacitor stacks

“…Briefly, the future of these devices is based not only on how well the technology can be made smaller but also ͑and in some cases, mainly͒ on how well new materials can be successfully integrated. [5][6][7][8][9][10] Device lifetime is strongly related to these instabilities. However, there are still a number of fundamental challenges.…”

Novel high-k dielectrics for nanoelectronics

“…As shown in Fig. 26, the flatband voltage shift is quite significant due to the traps and charges [93] which is observed for all lanthanide films annealed at 800°C. Novel High-k Dielectrics for Nanoelectronics (2016) Gadolinium oxide (Gd 2 O 3 ) is one of the rare earth oxides extensively studied due to having a half-filled 4f shell leading to its wide band gap (~5.…”

“…(9) where q is electron charge, ƒ being frequency of applied pulses, A G is the effective channel area and N it represents the area density of traps within the detectable energy and spatial ranges for a given CP measurement condition. Though, information of spatial and energy distribution of traps can easily be derived from CP measurements, there is a limiting factor to it which is its inability to conduct measurements on MOS devices due to lack of source and drain region [92,93].…”

Low-frequency noise behavior of La-doped HfSiON/metal gate nMOSFETs

“…8 shows frequency dependent CP results in the frequency range of 2 KHz to 2 MHz and the N t ratio of La-doped devices to that of un-doped devices. As the pulse frequency is reduced, electrically active traps farther away from the dielectric/substrate interface can be detected [9]. They showed at most about 70 % lower trap density than the un-doped devices while the La-doped devices showed about 85 % lower S vg than the un-doped devices (Fig.…”