For sequential stacking of an Al 2 O 3 passivation layer and a main HfO 2 gate dielectric layer on In 0.53 Ga 0.47 As, we used single-and dual-temperature atomic-layer deposition processes, and systematically compared their effects on the dielectric-related electrical properties. When the deposition of Al 2 O 3 passivation layer (approximately 0.7−0.8 nm) took place at relatively low temperatures of 100 °C, an increase in the subsequent deposition temperature for HfO 2 (from 100 to 300 °C) assisted in decreasing both capacitance-equivalent oxide thickness and the number of bulk-related traps. However, the valuable reduction in both near-interface defect density and leakage current through the low-temperature Al 2 O 3 passivation approach was monotonically lessened with an increase in the process temperature for the subsequent HfO 2 deposition, which suggests the need for a careful optimization of a thermal budget for the dualtemperature process. Keywords: HfO 2 , Al 2 O 3 , In 0.53 Ga 0.47 As, atomic-layer deposition, dual-temperature process