Electron and hole quantization and their impact on deep submicron silicon p- and n-MOSFET characteristics

Superlattices and Microstructures

et al. 2000

A 3D statistical 'atomistic' simulation technique has been developed to study the effect of the random dopant induced parameter fluctuations in aggressively scaled MOSFETs. Efficient implementation of the 'atomistic' simulation approach has been used to investigate the threshold voltage standard deviation and lowering in the case of uniformly doped MOSFETs, and in fluctuation-resistant architectures utilising epitaxial-layers and delta-doping. The effect of the random doping in the polysilicon gate on the threshold voltage fluctuations has also been thoroughly investigated. The influence of a single-charge trapping on the channel conductivity in decanano MOSFETs is studied in the 'atomistic' framework as well. Quantum effects are taken into consideration in our 'atomistic' simulations using the density gradient formalism.

Section: Simulation Approachsupporting

confidence: 78%

Section: Simulation Approachmentioning

confidence: 95%

Section: Simulation Approachmentioning

confidence: 99%

Section: Simulation Approachmentioning

confidence: 99%

See 2 more Smart Citations

Statistical 3D ‘atomistic’ simulation of decanano MOSFETs

Asenov

Slavcheva

Superlattices and Microstructures

et al. 2000

“…At such thickness, the atomic scale roughness of the top and bottom Si/SiO 2 interfaces, that is on the scale of ±1 atomic layer (%0.3 nm) will introduce appreciable variation in the silicon body thickness. Quantum confinement effects that change the position of the electron ground state associated with the body thickness variations and push the inversion layer away from the rough interface, smoothing the spatial inversion charge variations compared to classical simulations [11,12] have to be taken properly into account.…”

Section: Body Thickness Variation (Btv)mentioning

confidence: 99%

Combined sources of intrinsic parameter fluctuations in sub-25nm generation UTB-SOI MOSFETs: A statistical simulation study

Samsudin

Adamu-Lema

Solid-State Electronics

et al. 2007

The ultra thin body (UTB) SOI architecture offers a promising option to extend MOSFET scaling. However, intrinsic parameter fluctuations still remain one of the major challenges for the ultimate scaling and integration of UTB-SOI MOSFETs. In this paper, using 3D statistical numerical simulations, we investigate the impact of random discrete dopants, body thickness variations and line edge roughness on the magnitude of intrinsic parameter fluctuations in UTB-SOI MOSFETs. The sources of intrinsic parameter fluctuations, which can be separated in simulation, will occur simultaneously within a single MOSFET. To understand the impact of these sources of fluctuation in an actual device, simulations with all sources of intrinsic parameter fluctuations acting in combination have also been performed.

Implications of Imperfect Interfaces and Edges in Ultra-small MOSFET Characteristics

Asenov

Kaya

2002

phys. stat. sol. (b)

PACS : 73.40.Qv; 85.30.De We use 3D statistical simulations to analyze the influence of imperfect interfaces and edges in sub-100 nm MOSFET characteristics. In particular, we focus on the impact of gates deformed by line edge roughness, and of oxide thickness variations resulting from a rough Si/SiO 2 interface. The 3D simulations are based on a very efficient 3D drift-diffusion framework, which can introduce quantum mechanical corrections via the density gradient formalism. Random features at the gate edges and at the Si/SiO 2 interface have similar statistical descriptions, but use different parameter sets in accordance with measurements. In MOSFETs, both line edge roughness and oxide thickness variations result in intrinsic parameter fluctuations, which are comparable in magnitude to random dopant effects. We simulate the dependence of intrinsic fluctuations on the statistical model parameters of the roughness. We also consider the scaling of devices with rough gate edges and rough SiO 2 interfaces. Our results highlight the importance of including realistic geometry features in the design and analysis of MOSFETs below 50 nm regime.