Electron beam lithography over topography

Bauch, Lothar; Jagdhold, U.; Böttcher, M.

doi:10.1016/0167-9317(95)00193-x

Cited by 5 publications

(3 citation statements)

References 5 publications

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“…6f. This result seems to be in contrast to our earlier work [4,5]. In these works we reported on a reduced influence of the proximity effect for a structuring down to 70 nm lines and spaces done with "normal" low-voltage electron-beam lithography (accel.…”

Section: Resultscontrasting

confidence: 84%

“…Many workers report about applications using accelerating voltages of 20 and 30 kV and/or multi-layer resist systems and/or multi exposures, like dose-size split methods [2,3]. An alternative way to produce feature sizes in the sub-100 nm region of metallization layers seems to be the use of a single layer resist system and a low-voltage electron beam lithography [4,5]in combination with a lift-off process. The idea of this approach is to use the lateral scattering of the low voltage electrons to deposit a negative sloped energy density distribution into the resist which results in an undercut of the resist profile after wet development.…”

mentioning

confidence: 99%

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60-nm copper lines produced by a lift-off technique with 5-keV electrons: experiment and simulation

Jagdhold¹,

Bauch²,

Boettcher³

1997

Advances in Resist Technology and Processing XIV

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We present a lift-off technique based on a single layer resist system which produces sub-1 00 nm structures of a metallization layer using a low-voltage electron beam lithography. By using an accelerating voltage of 5 keY an undercut of the resist profile after electron beam lithography [1] is used to interrupt the anisotropically deposited copper layer so that a lift-off process produces structures for metallization layers. The two dimensional simulation of the whole process is based on a Monte-Carlo electron scattering calculation to describe the electron exposure, a cell-removal-algorithm to obtain the resist profiles after wet development and a string-algorithm to simulate the copper deposition. By optimizing this process, where the simulation assists the experiment, structures down to 60 nm are fabricated. . INTRODUCTIONDuring the recent years e-beam direct writing has been used to structure metallization layers for ASIC applications and T-and/or F-shaped gates for HEMT's (high electron mobility transistors). Caused by the down scaling of the size of transistors especially the dimensions of the metallization system have to be reduced down to the sub-100 nm region. Many workers report about applications using accelerating voltages of 20 and 30 kV and/or multi-layer resist systems and/or multi exposures, like dose-size split methods [2,3]. An alternative way to produce feature sizes in the sub-100 nm region of metallization layers seems to be the use of a single layer resist system and a low-voltage electron beam lithography [4,5]in combination with a lift-off process. The idea of this approach is to use the lateral scattering of the low voltage electrons to deposit a negative sloped energy density distribution into the resist which results in an undercut of the resist profile after wet development. This is possible because the total elastic cross section [6] of electrons which influences the lateral scattering is increased by a factor of 4, if the accelerating voltage is decreased from 20 to 5 keY. This undercut of the resist profile leads to shadowing during the following anisotropic copper deposition. Hence the copper film is interrupted between the bottom and the top of the resist profile. This effect allows to lift-off the copper layer on the top of the resist to produce sub-100 nm structures. We elucidate the interaction between the electron beam exposure and the wet development conditions to obtain an undercut of the resist profile and the deposition conditions for the metallization layer. A full-scale twodimensional simulation, from the electron beam exposure and the wet development of the resist over the deposition of the copper film to the final lift-off process, is used to assist the experiments. 0227-786X/97/$1O.OO SPIE Vol. 3049 / 757 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/21/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx

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Section: Resultscontrasting

confidence: 84%

mentioning

confidence: 99%

60-nm copper lines produced by a lift-off technique with 5-keV electrons: experiment and simulation

Jagdhold¹,

Bauch²,

Boettcher³

1997

Advances in Resist Technology and Processing XIV

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“…This is a result of electrons backscattering from the substrate and changing the feature profile near a topographic step. 26 For different reasons, it is impractical to pattern a wafer with topography with either the STM or AFM. In STM lithography the problem is usually one of beam spreading causing linewidth variations between regions.…”

Section: Patterning Over Topographymentioning

confidence: 99%

Hybrid atomic force/scanning tunneling lithography

Wilder¹

1997

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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We present a new technique for performing lithography with scanning probes that has several advantages over standard methods. This hybrid lithography system combines the key features of the atomic force microscope ͑AFM͒ and the scanning tunneling microscope ͑STM͒ by incorporating two independent feedback loops, one to control current and one to control force. We demonstrate a minimum resolution of 41 nm and nanometer alignment capabilities. This lithography system is capable of writing continuous features over sample topography. Topography is often present in real patterning applications and poses problems for AFM and STM lithography. We report 100 nm resist features patterned over 180 nm of topography created by local oxidation of silicon. The hybrid AFM/STM system is designed as a robust scanning probe lithography tool, capable of high-speed patterning and suited for integrated circuit lithography applications.

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