Electrostatic Force Assisted Exfoliation of Prepatterned Few-Layer Graphenes into Device Sites

Abstract

We present a novel fabrication method for incorporating nanometer to micrometer scale few-layer graphene (FLG) features onto substrates with electrostatic exfoliation. We pattern highly oriented pyrolytic graphite using standard lithographic techniques and subsequently, in a single step, exfoliate and transfer-print the prepatterned FLG features onto a silicon wafer using electrostatic force. We have successfully demonstrated the exfoliation/printing of 18 nm wide FLG nanolines and periodic arrays of 1.4 mum diameter pillars. Furthermore, we have fabricated graphene nanoribbon transistors using the patterned graphene nanoline. Our electrostatic force assisted exfoliation/print process does not need additional adhesion layers and could be stepped and repeated to deliver the prepatterned graphitic material over wafer-sized areas and allows the construction of graphene-based integrated circuits.

Synthesis of graphene

“…Graphene sheets of different thickness can indeed be obtained through mechanical exfoliation or by peeling off layers from graphitic materials such as highly ordered pyrolytic graphite (HOPG), single-crystal graphite, or [57] natural graphite [59][60][61][62][63]. This peeling/exfoliation can be done using a variety of agents like scotch tape [15], ultrasonication, [64] electric field [65] and even by transfer printing technique [66,67], etc. In certain studies the HOPG has also been bonded to the substrate either by regular adhesives like epoxy resin [64,68] or even by SAMs [69] to improve the yield of single and few layer graphene flakes.…”

“…Variety of solvents are used to disperse graphene in perfluorinated aromatic solvents [54], orthodichloro benzene [98], and even in low-boiling solvents such as chloroform and isopropanol [99,100]. Electrostatic force of attraction between HOPG and the Si substrate use in graphene on SiO 2 /Si substrates [65]. Laser exfoliation of HOPG has also been used to prepare FG, using a pulsed neodymium-doped yttrium aluminum garnet (Nd:YAG) laser [42,101].…”

Enabling graphene nanoelectronics.

“…Electrostatic transfer, an anodic bonding-derived technique, offers an alternative method for transferring epitaxial graphene. Random graphite flakes have been electrostatically deposited from HOPG onto Pyrex and silicon wafers [20][21][22].…”

“…Furthermore, this interface can be modeled as a pair of parallel conductor plates, from which the electrostatic pressure can be calculated. The minimum stress to exfoliate a graphene monolayer from bulk graphite is P = 0.4 MPa [22]. The pressure between the graphene and glass is estimated at P = ½ε o ε r E 2 , where ε o is the permittivity of free space, ε r is the dielectric constant of the glass (4.6 for Pyrex at room temperature), and assuming E = 300 MV/m.…”

Room Temperature Logic Inverter on Epitaxial Graphene-on-Silicon Device

“…[6][7][8][9][10][11] The realization of high-speed basic circuit components 12,13) has emphasized the need for highperformance digital units using graphene, and several logic inverter devices have been demonstrated using mechanically exfoliated graphene at cryogenic temperatures. [14][15][16][17] However, these devices have been a real challenge due to some unique properties of graphene, such as the ambipolarity and the zero bandgap, which led to undesirable imperfect complementary logic operation with excessive on/off state current resulting in input/output logic-level mismatch, therefore, their performances are still not comparable to silicon complimentary metal-oxide-semiconductor (CMOS), and far from the practical requirements.…”