Embedded test solution as a breakthrough in reducing cost of test for system on chips

Iijima, K.; Akar, A.; McDonald, Craig M.; Burek, D.

doi:10.1109/ats.2002.1181729

Cited by 3 publications

(1 citation statement)

References 9 publications

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“…ATE capital expenditure is one of the significant contributors to the overall test cost. Several approaches [2][3][4][5][6] are available, which are used to reduce test cost of SoC. But none of the approach talks about testing a SoC without ATE.…”

Section: Introductionmentioning

confidence: 99%

An Alternate Strategy of SoC Testing

Ghosh¹,

Ghosh²

2013

2013 International Conference on Communication Systems and Network Technologies

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As more and more peripherals are integrated in System-On-Chip (SoC), the production testing cost per device is increasing sharply, which is eating up the gross margin of the product significantly. This paper proposes an alternate scheme for production testing whereby major part of the SoC testing can be done with a pre-tested and pre-verified custom made SoC. It will help to minimize the dependencies of Automatic Test Equipment (ATE) for SoC testing in production significantly. Hence production testing cost per device will be reduced. Also this scheme will enable to test many of the functional features of SoC on silicon, which were not possible to test using ATE due to high test cost. In this paper the micro architectural details of the scheme, system requirements, design challenges and case study conducted on different SoCs are presented. And the impact of this approach is also discussed.

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