Emphasis of modulated techniques for cascaded multilevel inverters fed drive using FPGA

Reddy, V. Naga Bhaskar; Rao, S. Narasimha; Babu, Ch. Sai

doi:10.1109/icpec.2013.6527744

Cited by 6 publications

(4 citation statements)

References 7 publications

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“…The control diagram to generate switching signals for the switches (Sa1 to Sa6) by RMC selection control is as shown in Figure 7. The main advantage of using RMC is that it can be easily extended to any number of levels [13]- [14].…”

Section: Pwm Pattern For Switches (Sa1 To Sa6) Of Proposed MLI Using mentioning

confidence: 99%

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Grid Connected Distributed Generation System with High Voltage Gain Cascaded DC-DC Converter Fed Asymmetric Multilevel Inverter Topology

Rao¹,

Kumar

Babu³

2018

IJECE

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The paper presents distributed generation (DG) system in grid connected mode of operation with asymmetric multi-level inverter (AMLI) topology. Cascaded type DC-DC converter is employed to feed proposed AMLI topology. The DG output voltage (generally low voltage) is stepped up to the required level of voltage using high-gain DC-DC converter. Proposed AMLI topology consists of capacitors at the primary side. The output of high-gain DC-DC converter is fed to split voltage balance single-input multi-output (SIMO) circuit to maintain voltage balance across capacitors of AMLI topology. Cascaded DC-DC converters (both high-gain converter and SIMO circuit) are operated in closed-loop mode. The proposed AMLI feeds active power to grid converting DC type of power generated from DG to AC type to feed the grid. PWM pattern to trigger power switches of AMLI is also presented. The inverting circuit of MLI topology is controlled using simplified Id-Iq control strategy in this paper. With the proposed control theory, the active power fed to grid from DG is controlled and power factor is maintained at unity. The proposed system of DG integration to grid through cascaded DC-DC converters and AMLI structure is validated from fixed active power to grid from DG condition. The proposed system is developed and results are obtained using MATLAB/SIMULINK software.

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Section: Pwm Pattern For Switches (Sa1 To Sa6) Of Proposed MLI Using mentioning

confidence: 99%

“…To eliminate the disadvtanges in conventional two-level inverters, multi-level inverters are developed. A multilevel inverter [12]- [13] is a power electronic system that synthesizes a sinusoidal voltage output from several DC sources.…”

Section: Introductionmentioning

confidence: 99%

Grid Connected Distributed Generation System with High Voltage Gain Cascaded DC-DC Converter Fed Asymmetric Multilevel Inverter Topology

Rao¹,

Kumar

Babu³

2018

IJECE

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“…The prototype model of proposed cascaded based RV MLI is implemented using Xilinx Spartan FPGA [13,14] to validate the simulation results. The hardware realization circuit of the proposed system fed R-load is depicted in Figure 11 229 corresponding THD plot of the seven-level inverter.…”

Section: Implementation Of Cbrv Inverter Using Fpga Based Pulse Genermentioning

confidence: 99%

Implementation of Cascaded based Reversing Voltage Multilevel Inverter using Multi Carrier Modulation Strategies

Rao¹,

Kumar

Babu³

2018

IJPEDS

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In this paper, a cascaded based reversing voltage (CBRV) multilevel inverter structure is proposed inorder to compensate the major drawbacks in the conventional multilevel inverters. The proposed topology requires less number of components, less carrier signals and gate drives when compared to existing multilevel inverters particularly at higher levels. Therefore, the complexity and overall cost are greatly reduced particularly for higher output voltage levels. This paper also presents the most relevant control and modulation methods by a triangular based multi carrier pulse width modulation (PWM) scheme for the proposed CBRV inverter topology. This paper presents a comparison between different modulation strategies for CBRV inverter topology based on sinusoidal and space vector references with multi triangular carrier waves. The work strive hard to present the scrutiny that has been made between various PWM control techniques for 1–Ф seven level CBRV inverter structure. The comparison is made in terms of Total Harmonic Distortion (THD) and fundamental RMS voltage. Finally, the simulation results are included to verify the effectiveness of the proposed CBRV inverter topology and validate the proposed theory. A hardware set up was developed for a 1–Ф seven level CBRV inverter topology using FPGA based pulse generation.

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“…With the aid of a digital controller, these power switches perform power conversion by synthesizing the multiple DC voltage sources into a high voltage stepped output waveform. Multilevel inverters are mostly employed in medium-to-high-voltage range in utility and drive applications namely high-power motor drive, power conditioning, renewable energy conversion and power distribution [7,[9][10]. The advantages of multilevel inverter over two-level inverter are enhanced output voltage quality, low switching losses, high voltage capability, reduced total harmonic distortion and reduced dv dt ⁄ stresses on semiconductor switches which indirectly reduces electromagnetic compatibility (EMC) problems [5][6][7][10][11][12].…”

Section: Introductionmentioning

confidence: 99%

Multilevel inverter switching controller using a field programmable gate array (FPGA)

Noorsal¹,

Ibrahim²,

Rahim³

et al. 2018

J. Fundam and Appl Sci.

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Emphasis of modulated techniques for cascaded multilevel inverters fed drive using FPGA

Cited by 6 publications

References 7 publications

Grid Connected Distributed Generation System with High Voltage Gain Cascaded DC-DC Converter Fed Asymmetric Multilevel Inverter Topology

Grid Connected Distributed Generation System with High Voltage Gain Cascaded DC-DC Converter Fed Asymmetric Multilevel Inverter Topology

Implementation of Cascaded based Reversing Voltage Multilevel Inverter using Multi Carrier Modulation Strategies

Multilevel inverter switching controller using a field programmable gate array (FPGA)

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