1977
DOI: 10.1109/t-ed.1977.18781
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Endurance of thin-oxide nonvolatile MNOS memory transistors

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Cited by 25 publications
(3 citation statements)
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“…It has been reported (28,29) that there may be an appreciable increase in the interface state density of MNOS devices due to repeated write/erase cycling. This interface state density may be due to both the trapping states at the oxide-silicon interface and, near the oxide-nitride interface, of the MNOS devices (28).…”
Section: Analysis and Discussionmentioning
confidence: 99%
“…It has been reported (28,29) that there may be an appreciable increase in the interface state density of MNOS devices due to repeated write/erase cycling. This interface state density may be due to both the trapping states at the oxide-silicon interface and, near the oxide-nitride interface, of the MNOS devices (28).…”
Section: Analysis and Discussionmentioning
confidence: 99%
“…The control of the nitride thickness was long realized to be a major limitation in the performance of MNOS memory arrays [11] as electric field strengths in the silicon nitride were required to be below 5.5 MV/cm. to extend the endurance to erase/write cycling beyond 10 cycles.…”
Section: Physical Electronics Of Sonos Devicesmentioning
confidence: 99%
“…This treatment consists of exposing the native silicon surface to a gas mixture of HC1 and N~ at 750~ before subseiquent processing of the MNOS structure. It has recently been shown that this treatment may not provide devices with long-term endurance and retention properties (2). However, studying the mechanism of timezero improvement brought about by HC1 treatment is valuable.…”
mentioning
confidence: 99%