Energy efficiency vs. performance of the numerical solution of PDEs: An application study on a low-power ARM-based cluster

Göddeke, Dominik; Komatitsch, Dimitri; Geveler, Markus; Ribbrock, Dirk; Rajovic, Nikola; Puzovic, Nikola; Ramírez, Alex

doi:10.1016/j.jcp.2012.11.031

Cited by 58 publications

(34 citation statements)

References 38 publications

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“…They obtain 97 GFLOPS when running HPL on 96 nodes. Göddecke et al [30] use this cluster on a wide variety of scientific applications and find that the energy use compares favorably with an x86 cluster.…”

Section: Arm Cluster Buildingmentioning

confidence: 99%

A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

2016

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Abstract:Power consumption has become an increasingly important metric when building large supercomputing clusters. One way to reduce power usage in large clusters is to use low-power embedded processors rather than the more typical high-end server CPUs (central processing units). We investigate various power-related metrics for seventeen different embedded ARM development boards in order to judge the appropriateness of using them in a computing cluster. We then build a custom cluster out of Raspberry Pi boards, which is specially designed for per-node detailed power measurement. In addition to serving as an embedded cluster testbed, our cluster's power measurement, visualization and thermal features make it an excellent low-cost platform for education and experimentation.

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Section: Arm Cluster Buildingmentioning

confidence: 99%

A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

2016

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“…Hence, as opposed to x86 and other commodity designs (with a focus on chipset compatibility and performance), the resulting energy efficiency advantage can be made accessible to the HPC community. In our earlier work [10] we demonstrated reductions in the energy-to-solution of simulations by using ARM-based processors. Those findings were obtained on a cluster prototype built with NVIDIA Tegra 2 and continued later with Tegra 3 micro-architecture [21].…”

Section: Introductionmentioning

confidence: 98%

The ICARUS White Paper: A Scalable, Energy-Efficient, Solar-Powered HPC Center Based on Low Power GPUs

Geveler

Ribbrock

Donner

et al. 2017

Euro-Par 2016: Parallel Processing Workshops

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Abstract. We present a unique approach for integrating research in High Performance Computing (HPC) as well as photovoltaic (PV) solar farming and battery technologies into a container-based compute center designed for a maximum of energy efficiency, performance and extensibility/scalability. We use NVIDIA Jetson TK1 boards to build a considerably dimensioned cluster of 60 low-power GPUs, attach a 7.5 kWp solar farm and a 8 kWh Lithium-Ion battery power supply and integrate everything into a single-container, standalone housing. We demonstrate the success of our system by evaluating the performance and energy efficiency for common versatile dense and sparse linear algebra kernels as well as a full CFD code. By this work we can show, that with current technology, energy consumption-induced follow-up cost of HPC can be reduced to zero.

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“…The nodes interconnection and its limitations were studied in [9]. One of the first attempts of porting CFD applications to mobile architectures was presented in [10], where scalability tests were presented using up to 96 nodes, while in [11] it is presented a study of the energy efficiency of a CFD code on embedded platforms. In the current version the Mont-Blanc prototype is composed of 930 nodes with the SoC Samsung Exynos 5 that combines an ARM Cortex-A15 CPU and an OpenCL capable Mali T604 GPU.…”

Section: Introductionmentioning

confidence: 99%

“…This constitutes the baseline of the present paper, which is focused on optimizing the basic kernels composing the time integration to efficiently run on the Mont-Blanc prototype. In contrast to previous works [10,13], where applications were only ported to run on one of the two devices composing the Samsung Exynos 5 chip, here we present a multilevel heterogeneous approach that allows the concurrent execution in both the CPU and GPU devices.…”

Section: Introductionmentioning

confidence: 99%

Efficient CFD code implementation for the ARM-based Mont-Blanc architecture

Oyarzun

Borrell

Gorobets

et al. 2018

Future Generation Computer Systems

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h i g h l i g h t s• Termo Fluids CFD code has been run on up to 128 ARM-based Mont-Blanc nodes.• An heterogeneous implementation has been developed to occupy the overall system.• A dynamic Tabu search load balance algorithm distributes the workload among devices.• The hybrid approach is up to times faster than the CPU-only version of the code.• Mont-Blanc nodes are 41% more energy efficient than Minotauro hybrid nodes. t r a c tSince 2011, the European project Mont-Blanc has been focused on enabling ARM-based technology for HPC, developing both hardware platforms and system software. The latest Mont-Blanc prototypes use system-on-chip (SoC) devices that combine a CPU and a GPU sharing a common main memory. Specific developments of parallel computing software and well-suited implementation approaches are of crucial importance for such a heterogeneous architecture in order to efficiently exploit its potential. This paper is devoted to the optimizations carried out in the TermoFluids CFD code to efficiently run it on the Mont-Blanc system. The underlying numerical method is based on an unstructured finite-volume discretization of the Navier-Stokes equations for the numerical simulation of incompressible turbulent flows. It is implemented using a portable and modular operational approach based on a minimal set of linear algebra operations. An architecture-specific heterogeneous multilevel MPI+OpenMP+OpenCL implementation of such kernels is proposed. It includes optimizations of the storage formats, dynamic load balancing between the CPU and GPU devices and hiding of communication overheads by overlapping computations and data transfers. A detailed performance study shows time reductions of up to 2.1× on the kernels' execution with the new heterogeneous implementation, its scalability on up to 128 MontBlanc nodes and the energy savings (around 40%) achieved with the Mont-Blanc system versus the highend hybrid supercomputer MinoTauro.

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Energy efficiency vs. performance of the numerical solution of PDEs: An application study on a low-power ARM-based cluster

Cited by 58 publications

References 38 publications

A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

A Raspberry Pi Cluster Instrumented for Fine-Grained Power Measurement

The ICARUS White Paper: A Scalable, Energy-Efficient, Solar-Powered HPC Center Based on Low Power GPUs

Efficient CFD code implementation for the ARM-based Mont-Blanc architecture

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