Energy efficient adaptive clustering of on-chip power delivery systems

P.-Vaisband, Inna; Friedman, Eby G.

doi:10.1016/j.vlsi.2014.06.003

Cited by 10 publications

(2 citation statements)

References 40 publications

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“…To detect power grid probing, we propose to reveal these fine, non-typical voltage variations with compact power efficient sensors integrated on-chip. PDN exploration at the circuit level is however highly complicated in VLSI systems and straightforward analysis of power profile is computationally infeasible in real-time [31]. To detect these fine voltage variations in modern power grids, advanced algorithms are required for classifying the captured power information into secure and compromised categories.…”

Section: Introductionmentioning

confidence: 99%

Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations

Kenarangi

Partin-Vaisband

2019

IEEE Trans. Circuits Syst. I

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Modern power analysis attacks (PAAs) and existing countermeasures pose unique challenges on the design of simultaneously secure, power efficient, and high-performance ICs. In a typical PAA, power information is collected with a monitoring circuit connected to the compromised device. The non-typical voltage variations induced on a power distribution network (PDN) by such a malicious probing are sensed with on-chip sensors and exploited in this paper for detecting PAAs in real-time using statistical analysis. A closed-form expression for the voltage variations caused by malicious probing is provided. Guidelines with respect to the PDN characteristics and number of sensors are proposed for securing power delivery. The PAA detection system is designed in a 45-nm standard CMOS process. Based on the simulation results, a PAA on an IBM benchmarked microprocessor is detected with the accuracy of 88% with 30 on-chip sensors. Power overhead of 0.34% and 14.3% is demonstrated in, respectively, the IBM microprocessor and a typical advanced encryption standard system. In a practical cryptographic device, security sensitive PDN regions can be identified, significantly reducing the number of the on-chip sensors.

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Section: Introductionmentioning

confidence: 99%

Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations

Kenarangi

Partin-Vaisband

2019

IEEE Trans. Circuits Syst. I

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“…Finally, a reconfigurable SC converter architecture is required in the power management solution to provide multiple conversion ratios and be able to deal with any changes to either the input voltage sourced by an energy-harvester and/or the output voltage required for a different mode of system operation (such as sleep, ECG measurement, data transmission). Such a converter architecture will allow re-use of the SC DC-DC converter to serve a wide range of voltages and loads, reducing design time and reducing total area [ 23 , 24 ]. The design solution presented in this paper presents such a reconfigurable SC converter suitable for a wearable ECG front-end application that is small, cost-effective and power efficient, using a novel system architecture and modern control schemes.…”

Section: Introductionmentioning

confidence: 99%

Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management

George

Lehmann

Hamilton

2015

Sensors

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Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm2), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

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