Enhanced split-architecture Δ-Σ ADC

Lee, K.; Temes, Gábor C.

doi:10.1049/el:20061218

Cited by 19 publications

(6 citation statements)

References 3 publications

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“…In [1,2] cross noisecoupled split Σ∆-modulator architectures are presented. In such an architecture, the noise of one loop is injected into the other loop as shown in Fig.…”

Section: Cross Noise-couplingmentioning

confidence: 99%

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

Bock

Rombouts

2011

Analog Integr Circ Sig Process

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A double-sampling split Σ∆-ADC with bilinear integrators and a 7-level quantizer is presented. It achieves third order noise shaping with a second order modulator through quantization noise-coupling. The modulator is integrated in a 130 nm CMOS technology. For a clock frequency of 48 MHz and an oversampling ratio of 20 (2.4 MHz signal bandwidth), it achieves 72 dB DR and 68 dB SNR. The prototype consumes 8 mW from a 1.2 V voltage supply.

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“…In [1,2] cross noisecoupled split Σ∆-modulator architectures are presented. In such an architecture, the noise of one loop is injected into the other loop as shown in Fig.…”

Section: Cross Noise-couplingmentioning

confidence: 99%

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

Bock

Rombouts

2011

Analog Integr Circ Sig Process

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“…2. Thus, the output of the modulator with NTF enhancement can be expressed as: (2) where Assume that the modulator is designed with a finite-impulseresponse (FIR) NTF: (3) Then, to increase the overall noise-shaping order by 1, define the enhancement factor in equation (2) as: (4) However, there is no CT representation of equation (4), based on the impulse-invariant transform. Therefore, a real pole P is introduced into the enhancement factor:…”

Section: A Fundamentals Of Ntf Enhancementmentioning

confidence: 99%

“…A further improvement in stability can be achieved if the coupled quantization noise and the noise introduced by the quantizer were uncorrelated. This can be accomplished by applying the NTF-enhancement technique to the modulators with split architecture [3]. In this case, the NTF-enhancement modulator will maintain the stability of the original modulator (i.e., before NTF-enhancement).…”

Section: Tolerance To Integrator Coefficient Errorsmentioning

confidence: 99%

“…The advantage of this technique is that the noise-shaping performance of the modulator can be enhanced, while maintaining its original stability (before NTF enhancement). The modulator stability can be further improved by applying the NTF-enhancement technique to modulators with split architectures, in order to uncorrelate the coupled quantization noise from the quantization noise introduced by the quantizer in each path of the split modulator [3]. In this paper, the NTF-enhancement technique is developed for CT modulators.…”

Section: Introductionmentioning

confidence: 99%

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Continuous-time ΔΣ modulators with noise-transfer-function enhancement

Ali

Hamoui

2008

2008 IEEE International Symposium on Circuits and Systems (ISCAS)

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A technique is presented to design high-order continuous-time (CT) modulators using noise-transferfunction (NTF) enhancement. This is achieved by coupling the quantization noise into the forward path of the CT modulator, using a passive CT filter. This introduces a real pole-zero pair into the NTF. Thus, the order of the NTF is increased, without affecting the signal transfer function (STF). The proposed NTF-enhancement technique is applied to a CT modulator with a feedforward architecture, where all feedforward paths are summed within the last integrator of the loop filter, thereby eliminating the need for an analog summation amplifier at the quantizer input. Behavioral simulation results confirm the improved noise-shaping and stability characteristics of the proposed feedforward CT modulator with NTF enhancement, compared to classical CT modulators.

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“…The structures of basic ∆Σ converters have been modified in many ways. An enhanced-split architecture has been proposed recently [3], and this architecture, compared with the conventional ones, features several advantages. It provides enhanced noise shaping without any stability issues.…”

Section: Introductionmentioning

confidence: 99%

An enhanced dual-path ΔΣ analog-to-digital converter

Nishida

Temes

2009

2009 IEEE International Symposium on Circuits and Systems

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This paper presents an enhanced dual-path deltasigma ADC. The first-order enhancement of the quantization noise shaping is achieved by employing a switched capacitor circuit technique. A test chip, fabricated in a 0.18-µm CMOS process, provides a signal-to-noise+distortion ratio (SNDR) of 75-dB for a 1.0-MHz signal bandwidth clocked at 40-MHz. The 2 nd harmonic is -101-dB and the 3 rd one is -94-dB when a -4.5-dB 100-kHz input signal is applied. I.978-1-4244-3828-0/09/$25.00 ©2009 IEEE

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Enhanced split-architecture Δ-Σ ADC

Cited by 19 publications

References 3 publications

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

Continuous-time ΔΣ modulators with noise-transfer-function enhancement

An enhanced dual-path ΔΣ analog-to-digital converter

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Enhanced split-architecture Δ-Σ ADC

Cited by 19 publications

References 3 publications

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

A 8 mW 72 dB ΣΔ-modulator ADC with 2.4 MHz BW in 130 nm CMOS

Continuous-time ΔΣ modulators with noise-transfer-function enhancement

An enhanced dual-path &#x0394;&#x03A3; analog-to-digital converter

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An enhanced dual-path ΔΣ analog-to-digital converter