Enhancement-mode gan hybrid mos-hemts with r on,sp  of 20 mω-cm<sup>2</sup>

Huang, W.; Li, Zhongda; Chow, T. Paul; Niiyama, Yuki; Nomura, Takahiro; Yoshida, Seikoh

doi:10.1109/ispsd.2008.4538957

Cited by 54 publications

(27 citation statements)

References 10 publications

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“…As a result, carrier concentration and Hall mobility can be measured at different gate voltages and thus can be modelled as a function of surface electric field. The Hall mobilities were less than 10% of the GaN bulk mobility, and were around 4 times lower than our previous mobility result on etched GaN surface on sapphire substrate [1]. The difference may come from the unoptimized dry and wet etch process.…”

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confidence: 73%

“…GaN MOS-gated FETs have much lower gate leakage compared with HEMT, and the ability to have positive threshold voltage up to +6 V [1]. Besides the more conventional RESURF MOSFET with implanted drift region [2], hybrid MOS-HEMTs with recessed MOS gate using the AlGaN/GaN hetero-structure as drift region have also been demonstrated [1].…”

mentioning

confidence: 99%

“…Besides the more conventional RESURF MOSFET with implanted drift region [2], hybrid MOS-HEMTs with recessed MOS gate using the AlGaN/GaN hetero-structure as drift region have also been demonstrated [1]. However, the resistance of the MOS channel is much higher than the AlGaN/GaN channel in HEMTs, due to the much lower channel mobility.…”

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confidence: 99%

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Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

Naik

Chow

2011

Phys. Status Solidi C

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We report on the experimental results of the MOS field‐effect and Hall mobilities measured on etched surface of GaN grown on silicon substrate. The peak MOS Hall mobility was extracted to be 23 cm2/V‐s, and the Hall mobility was then modelled using physics‐based model. The effects of Columbic scattering, phonon scattering, and surface roughness were evaluated, and the limiting factor of the GaN MOS mobility was identified as Columbic scattering caused by the combination of high interface charges and traps at the GaN MOS interface. The GaN MOS surface roughness extracted from the modelling was comparable to silicon MOS interface. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

Naik

Chow

2011

Phys. Status Solidi C

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“…In this sense, a very promising structure for an improved GaN power switch could be the hybrid MOS-high electron mobility transistors ͑HEMTs͒. 6 This hybrid MOS-HEMT concept is based in the incorporation of an AlGaN/ GaN heterostructure 7 into the reduced surface field region of lateral enhancement-mode GaN MOSFETs. A hybrid MOS-HEMT has the advantage of both, the MOS gate control and the high mobility Two Dimensional Electron Gas ͑2DEG͒ ͑Refs.…”

Section: Introductionmentioning

confidence: 99%

GaN metal-oxide-semiconductor field-effect transistor inversion channel mobility modeling

Pérez‐Tomás

Placidi

Perpiñà

et al. 2009

Journal of Applied Physics

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Lateral n-channel enhancement-mode GaN metal-oxide-semiconductor ͑MOS͒ field-effect transistors and lateral capacitors have been fabricated on a p-type epi-GaN substrate semiconductor and electrically characterized at different temperatures. A clear positive behavior of the inversion channel mobility with temperature has been obtained. A physics-based model on the inversion charge and charge trapped in interface states characteristics has been used to investigate the temperature dependence of the inversion MOS channel mobility. The field-effect mobility increase with temperature is due to an increase in the inversion charge and a reduction in the trapped charge for a given voltage gate. Then, for larger gate bias and/or higher temperatures, surface roughness effects become relevant. The good fitting of the model with the experimental data leads us to consider that the high density of charged acceptor interface traps together with a large interface roughness modulates the channel mobility due to scattering of free carriers in the inversion layer. A closed form expression for the experimental inversion MOS channel mobility is proposed.

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“…Achieving E-mode operation in GaN is challenging because the polarization induced 2DEG or 2DHG first needs to be depleted at zero gate voltage. In n-channel GaN HFETs or MOSHFETs, various techniques to implement E-mode behaviour are recessed gate [8]- [10], or ion implantation [11]- [13]: both methods can be employed on a PSJ platform. On the other hand, less attention has been paid to p-channel devices due to the low mobility of holes in GaN ( at room temperature [14]), which leads to poor on-current and switching speed.…”

Section: Introductionmentioning

confidence: 99%

An E-Mode p-Channel GaN MOSHFET for a CMOS Compatible PMIC

Kumar

Souza

2017

IEEE Electron Device Lett.

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Enhancement-mode gan hybrid mos-hemts with r on,sp of 20 mω-cm²

Cited by 54 publications

References 10 publications

Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

GaN metal-oxide-semiconductor field-effect transistor inversion channel mobility modeling

An E-Mode p-Channel GaN MOSHFET for a CMOS Compatible PMIC

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Enhancement-mode gan hybrid mos-hemts with r on,sp of 20 mω-cm2

Cited by 54 publications

References 10 publications

Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

Modeling and experimental study of MOS channel mobility of etched GaN on silicon substrate

GaN metal-oxide-semiconductor field-effect transistor inversion channel mobility modeling

An E-Mode p-Channel GaN MOSHFET for a CMOS Compatible PMIC

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Product

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Enhancement-mode gan hybrid mos-hemts with r on,sp of 20 mω-cm²