No abstract

To study the mobility limiting mechanisms in (0001) 4H-SiC and 6H-SiC MOSFETs, physics based modeling of the inversion mobility of has been done. Two very different limiting mechanisms have been found for 4H-SiC and 6H-SiC MOSFETs. The mobility in 6H-SiC MOSFETs is limited by phonon scattering while the 4H-SiC MOSFET mobility is limited by Coulombic at low electric fields and surface roughness scattering at high electric fields.

This paper compares the performance of 4H-SiC MOS capacitors and MOSFETs made using the conventional NO annealing process and a high-temperature (1400°C) dry oxidation process. Through extensive C-V, G-ω, I-V and Hall measurements, the limitations of both the processes are discussed.

The effects of using a graphite capping layer during implant activation anneal on the performance of 4H-SiC MOSFETs has been evaluated. Two sets of samples, one with the graphite cap and another without, with a gate oxide process consisting of a low-temperature deposited oxide followed by NO anneal at 1175°C for 2hrs were used for characterization. Various device parameters, particularly threshold voltage, subthreshold slope, field-effect mobility, inversion sheet carrier concentration and Hall mobility have been extracted for the two processes.

We have comparatively characterized the electrical characteristics of 4H‐SiC and 2H‐GaN MOS capacitors and FETs. While progressive refinement of gate oxide processes, notably with NO anneal, has resulted in better threshold voltage control, reduced subthreshold slope and higher field‐effect mobility for 4H‐SiC MOSFETs, we have recently reported more superior MOS parameters for 2H‐GaN MOSFETs. In addition, we have performed MOS‐gated Hall measurements to extract the intrinsic carrier concentration and MOS mobility, indicating that both less channel electron trapping and scattering take place in 2H‐GaN MOSFETs. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)