Enhancement of breakdown voltage for fully-vertical GaN-on-Si p-n diode by using strained layer superlattice as drift layer

Mase, Suguru; Hamada, Takeaki; Freedsman, Joseph J.; Egawa, Takashi

doi:10.1088/1361-6641/aabb8f

Cited by 5 publications

(3 citation statements)

References 21 publications

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“…By using AlN/GaN SL thin films, Feltin et al, showed a reduction in the tensile stress without getting cracks [17]. Mase et al, improved the breakdown voltage in Si-doped AlN/GaN SL p-n diode [18]. In particular, SL structure could play a significant role in stress management, which reduces GaN tensile stress by providing compressive stress as GaN HEMT heterostructure grown on a silicon substrate.…”

Section: Introductionmentioning

confidence: 99%

Effects of AlN/GaN superlattice buffer layer on performances of AlGaN/GaN HEMT grown on silicon for sub-6 GHz applications

Hieu¹,

Hsu²,

Chiang³

et al. 2022

Semicond. Sci. Technol.

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In this study, the effects of AlN/GaN superlattice (SL) thickness on performances of AlGaN/GaN high electron mobility transistor (HEMT) heterostructure grown by metal-organic chemical vapor deposition (MOCVD) on silicon is investigated. Stress in GaN is controlled by varying the total thickness of the AlN/GaN SL. Improved crystal quality and surface roughness accomplished with 2200 nm-thick AlN/GaN SL, leads to an increase in high electron mobility (1760 cm2/V·s) as well as two-dimensional electron gas (2DEG) concentration (1.04×1013 cm-2). AlGaN/GaN metal-insulator-semiconductor HEMT (MIS-HEMT) fabricated on the heterostructure with SL buffer layer exhibits a significant improvement in maximum saturation current of 1100±29 mA/mm at VGS = 0 V and a low on-resistance (RON) of 4.3±0.15 Ω·mm for the optimized AlN/GaN SL. The 2200 nm-thick AlN/GaN SL supports the growth of stress-free GaN heterostructure, which can reduce the insertion loss for sub-6 GHz RF applications. This GaN HEMT structure based on superlattice buffer layer is suitable for low-frequency RF power applications.

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Section: Introductionmentioning

confidence: 99%

Effects of AlN/GaN superlattice buffer layer on performances of AlGaN/GaN HEMT grown on silicon for sub-6 GHz applications

Hieu¹,

Hsu²,

Chiang³

et al. 2022

Semicond. Sci. Technol.

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“…But such techniques make the fabrication process more complicated and increase the production cost [11]. Recently, our research group reported the reduction of the series resistance for a fully‐vertical GaN p – n diode on Si without QVS and SRT by introducing a heavily Si‐doped 3‐nm‐thin AlN initial layer on Si followed by a 3.3

μ

m Si‐doped GaN/AlN SLS structure [12]. Therefore, such an epi‐layer structure could be implemented to improve the current conduction in a fully‐vertical GaN metal‐oxide‐semiconductor field effect transistor (MOSFET) on Si.…”

Section: Introductionmentioning

confidence: 99%

Demonstration of fully‐vertical GaN‐on‐Si power MOSFETs using regrowth technique

et al. 2019

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The authors are reporting for the first time the fabrication of GaN-based fully-vertical high-power metal-oxide-semiconductor field effect transistors on Si. The electrical measurements of the fabricated device exhibited both vertical and lateral modes of operation. The transfer characteristics of the device in vertical mode showed a peak trans-conductance (G m, max) of 23.6 mS/mm with a threshold voltage (V th) of −19.6 V. The maximum current drain density (I D, max) of 249.3 mA/mm was observed with ON-resistance (R ON) of 44.2 V-mm. The electrical results obtained in the vertical mode were also compared with the laterally oriented devices. The comparison of the electrical results indicates a relatively higher ON-resistance of the device in the vertical configuration, due to the contribution of the series resistance of the buffer layers in the epi-structure.

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“…Therefore, to develop a convenient and process compatible device structure, we have implemented a highly doped conductive buffer layer in GaNon-Si epi-structure for the vertical GaN devices. Recently, our research group has demonstrated a method to improve the forward resistance by inserting a heavily Si-doped ultra-thin AlN initial layer on Si and a 3.3 μm-thick conductive n + -GaN/AlN strained layer superlattice (SLS) structure in a fully-vertical structure of a GaN p-n diode on Si [19,20]. A similar buffer layer structure was also employed to develop the GaN-based fully-vertical metal-oxide-semiconductor field-effect transistors (V-MOSFETs) on Si to investigate primitive electrical characteristics of the devices [21].…”

Section: Introductionmentioning

confidence: 99%

Epitaxial regrowth and characterizations of vertical GaN transistors on silicon

Biswas¹,

Torii²,

Yamamoto³

et al. 2019

Semicond. Sci. Technol.

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We report the fabrication of fully-vertical GaN-based metal-oxide-semiconductor field-effect transistors (V-MOSFETs) on Si. A p-GaN current aperture was introduced in the vertical device epi-structure using plasma-based dry etching and epitaxial regrowth technique to control the vertical current conduction. The fabricated V-MOSFET exhibited drain current density of 2.5 kA cm −2 with ON-resistance (R ON ) of 4.3 mΩ-cm 2 . The transfer characteristics of the device showed a peak trans-conductance (G m,max ) of 248 S cm −2 with a threshold voltage (V th ) of −18.7 V during OFF-to-ON-state sweeping. However, a blocking voltage of 36.5 V (drain current density 0.3 kA cm −2 ) was observed under an OFF-state condition of the device which needs further improvement for the high-power device applications.

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Enhancement of breakdown voltage for fully-vertical GaN-on-Si p-n diode by using strained layer superlattice as drift layer

Cited by 5 publications

References 21 publications

Effects of AlN/GaN superlattice buffer layer on performances of AlGaN/GaN HEMT grown on silicon for sub-6 GHz applications

Effects of AlN/GaN superlattice buffer layer on performances of AlGaN/GaN HEMT grown on silicon for sub-6 GHz applications

Demonstration of fully‐vertical GaN‐on‐Si power MOSFETs using regrowth technique

Epitaxial regrowth and characterizations of vertical GaN transistors on silicon

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