Enhancing Signal and Power Integrity Using Double Sided Silicon Interposer

Sridharan, Vivek; Swaminathan, Madhavan; Bandyopadhyay, Tapobrata

doi:10.1109/lmwc.2011.2169239

Cited by 16 publications

(9 citation statements)

References 4 publications

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“…Dedicated planes for power and ground are preferred compared to the power/ground grid. 100 The decoupling capacitors temporarily store and provide the electrical charges when currents drawn by ICs fluctuate. Together with equivalent series inductance of PDN, decoupling capacitors function as a low-pass filter to suppress high frequency voltage fluctuation, and thus reduce the voltage noise contributed from the simultaneous transistor switching.…”

Section: Decoupling Capacitorsmentioning

confidence: 99%

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Heterogeneous 2.5D integration on through silicon interposer

Zhang¹,

Lin²,

Wickramanayaka³

et al. 2015

Applied Physics Reviews

130

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Section: Decoupling Capacitorsmentioning

confidence: 99%

“…[99][100][101][102] A comprehensive thermal characterization is conducted on the TSI package with bare-die and overmolded packages. 112 The measured thermal resistance (Theta JA) is 35 K/W under natural convection.…”

Section: Thermal Considerations Of 25d Packagesmentioning

confidence: 99%

Heterogeneous 2.5D integration on through silicon interposer

Zhang¹,

Lin²,

Wickramanayaka³

et al. 2015

Applied Physics Reviews

130

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“…However, low dielectric loss generates another issue. Ground planes on both sides of glass core behave as cavity resonators, and the insertion loss of signal lines through glass cores degrades near resonance frequencies [4]. This report proposes a ground plane resonance suppression technique for glass interposers that enables high data rate signal lines.…”

Section: Introductionmentioning

confidence: 99%

Ground planes resonance suppression technique of glass interposer using high-resistivity via holes for high-speed serial links

Toyama

Uematsu

Yorita

et al. 2015

2015 IEEE 4th Asia-Pacific Conference on Antennas and Propagation (APCAP)

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System in package with glass interposers have been proposed to enable continuing improvements in communication performance and computing performance. One issue posed by glass interposers is the plane resonance resulting from low dielectric loss. This paper proposes a ground plane resonance suppression technique suitable for glass interposers using resistive vias. Placing high resistivity vias at each corner of plane effectively suppresses resonance. The optimal resistance is at the inflection point of the resonance frequency, or around 5 ohm for a 30 mm square glass interposer.

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“…To achieve a return current path and eliminate the return path discontinuity (RPD) there are several solution to resolve the problem [2,3]. In addition, there are also studies on chip/package level noise reduction methods and organization of power ground stack-up to enhance the SI [4,5]. Various noise suppression techniques have been introduced in the previous documents for stable operation of the PDN [5][6][7][8][9][10][11][12][13][14][15].…”

Section: Introductionmentioning

confidence: 99%

“…In addition, there are also studies on chip/package level noise reduction methods and organization of power ground stack-up to enhance the SI [4,5]. Various noise suppression techniques have been introduced in the previous documents for stable operation of the PDN [5][6][7][8][9][10][11][12][13][14][15]. Conventional suppression methods have adapted decoupling capacitors or embedded capacitors, split power/ground planes, and other techniques.…”

Section: Introductionmentioning

confidence: 99%

A Noise Suppression Technique Using Dual Layer Spirals With Various Ground Structure for High-Speed PCBS

Chung

Kang

Song

et al. 2013

PIER B

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Abstract-In this paper, small dual layer spirals with several various ground structure are applied in the vicinity of the DDR3 high-speed circuit to achieve noise suppression characteristics up to 3.2 GHz region. For wider noise suppression bandwidth, the dual layer spirals with various ground structure, which provide high self resonance frequency (SRF) as well as inductance value, are implemented. The proposed dual layer spiral with various ground clearance dimension exhibits greater than 9 dB power noise suppression characteristics in the frequency range of interests and achieve about 50% voltage fluctuation reduction in time domain compare to the reference case model. To validate the effectiveness of the proposed model, sample PCB are fabricated and measured. It shows good agreement between the measured and simulated results up to 3.2 GHz.

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Enhancing Signal and Power Integrity Using Double Sided Silicon Interposer

Cited by 16 publications

References 4 publications

Heterogeneous 2.5D integration on through silicon interposer

Heterogeneous 2.5D integration on through silicon interposer

Ground planes resonance suppression technique of glass interposer using high-resistivity via holes for high-speed serial links

A Noise Suppression Technique Using Dual Layer Spirals With Various Ground Structure for High-Speed PCBS

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