EUV mask readiness and challenges for the 22nm half pitch and beyond

Chan, Y. David

doi:10.1117/12.896913

Cited by 4 publications

(2 citation statements)

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“…However, past experience has shown that it is a great challenge for the blank vendors to achieve such a goal with any reasonable blank yield. [1][2][3][4] In fact, ML blanks with zero defect at sizes ≥50nm has never been demonstrated even for a champion ML blank by the blank vendors so far. If we have a ML blank with only a few printable defects, can we use these blanks to fabricate a mask and still yield a defect-free mask?…”

Section: Introductionmentioning

confidence: 87%

EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

et al. 2012

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For Extreme Ultra-violet Lithography (EUVL) targeting at 11nm and beyond design rules, the minimum printable EUVL multilayer (ML) mask defect size can be as small as 20-25nm. As a result, the defect-free EUVL ML mask blank fabrication remains the top challenge for EUVL mask. Aspects of this challenge include high quality blank substrate material (low thermal expansion material) fabrication, substrate polishing, substrate cleaning, blank handling, ML deposition, and high sensitivity substrate and blank defect inspection. High investment cost and potential low blank yield due to stringent defect-free requirement can quickly drive up EUVL cost of ownership. It is anticipated, however, the EUVL ML blank yield can be drastically improved if we can allow a few defects on a ML blank. Utilizing such a "defective" grade mask blank to fabricate a defect-free EUVL mask requires several defect mitigation schemes during mask patterning processes. These schemes include modifying mask absorber pattern via repair tool to compensate the effect of an adjacent ML defect and using absorber pattern to cover the ML defects. In this paper, we focused on the study and demonstration of using device pattern to cover limited number of blank defects. The steps of this defect mitigation process include blank fiducial mark patterning, defect location relative to fiducial mark precision measurement, automated pattern shift solution simulation for a given ML defect map, and precision alignment of the device pattern to the blank defects during e-beam write. With these steps, we have successfully demonstrated the coverage of several targeted ML blank defects simultaneously via global device pattern shift.

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Section: Introductionmentioning

confidence: 87%

EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

et al. 2012

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“…Over the past years, EUV lithography has been actively researched and developed as the next-generation lithography (NGL) solution although its readiness for high volume manufacturing (HVM) has been long-awaited and still unclear 1,2 . Double patterning techniques, such as litho-litho-etch (LLE) 3,4 , litho-etch-litho-etch (LELE) 5,6 , and self-aligned double patterning (SADP) 7,8 have been developed to extend the ultimate resolution k 1 factor of 193 nm immersion lithography.…”

Section: Introductionmentioning

confidence: 99%

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask

et al. 2014

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The Cost of Ownership (CoO) for semiconductor processing has been primarily dominated by lithography. In multiple patterning processes, additional materials and the impact to throughput of multiple patterning passes appear to become additional major contributors to manufacturing cost as well. We introduce SiO x N y hardmask as a new memorization layer for multiple patterning that addresses the non-lithographic cost contributor to manufacturing. The optical constants of the SiO x N y hardmask are matched to those of the photoresist at the imaging wavelength, and that makes it invisible at the exposure wavelength, enabling lithography directly over the hardmask topography, while at the same time it will be visible to those wavelengths that are used for alignment and overlay. The SiO x N y hardmask is inserted below the photoresist which will make the rework and integration schemes much simpler and result in cost savings by replacing only photoresist layers during multiple patterning processes. Additionally, by eliminating the need for traditional spincast planarization and the associated tri-layer etch we can improve the critical dimension uniformity (CDU) and reduce proximity contributions from etch, and their respective etch proximity corrections. In this work, we engineered the lithographic stack to be compatible with the invisible SiO x N y hardmask. Lithographic process windows, CDU, and LER/LWR are compared with conventional tri-layer stack and we demonstrate triple patterning memorized into the SiO x N y hardmask after which patterns are then transferred, at once, into the bottom integrated stack. Finally, major benefits of using the invisible hardmask on device scaling and patterning challenges are discussed, such as for LE 2 , LE 3 , and trench and cut patterning.

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Reduction of airborne molecular contamination on an extreme ultraviolet reticle dual pod using clean dry air purging technology

Chiu¹,

Shiue

et al. 2016

Microelectronic Engineering

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EUV mask readiness and challenges for the 22nm half pitch and beyond

Cited by 4 publications

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EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask

Reduction of airborne molecular contamination on an extreme ultraviolet reticle dual pod using clean dry air purging technology

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EUV mask readiness and challenges for the 22nm half pitch and beyond

Cited by 4 publications

References 0 publications

EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

EUVL multilayer mask blank defect mitigation for defect-free EUVL mask fabrication

Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask

Reduction of airborne molecular contamination on an extreme ultraviolet reticle dual pod using clean dry air purging technology

Contact Info

Product

Resources

About

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask