Examination of Additive Mobility Enhancements for Uniaxial Stress Combined with Biaxially Strained Si, Biaxially Strained SiGe and Ge Channel MOSFETs

Weber, O.; Irisawa, Toshifumi; Numata, T.; Harada, Miyuki; Taoka, Noriyuki; Yamashita, Y; Yamamoto, Takeshi; Sugiyama, N.; Takenaka, Mitsuru; Takagi, Shinichi

doi:10.1109/iedm.2007.4419047

Cited by 36 publications

(26 citation statements)

References 7 publications

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“…The PR coefficients for wide devices are in good agreement with the values generally reported in literature for 110 /(100) inversion surface in undoped FDSOI MOSFETs taking into account that various parameters can affect theses values (inversion carrier density, surface roughness...) [9], [21]. Fig.…”

Section: Piezoresistive Coefficientssupporting

confidence: 87%

“…In all the cases, the transverse coefficient reduces toward 0 as the top width is scaled down below 10nm. However it is noteworthy that the longitudinal piezoresistive coefficients π L of FinFETs (100) MOSFETs (data from [9], [12]). The bold line corresponds to the model fit for piezoresistive coefficients (see text).…”

Section: Piezoresistive Coefficientsmentioning

confidence: 99%

“…The piezoresistivity theory provides a simple description of the effect of strain on transport properties of transistors through the use of piezoresistive coefficients (PR), which relate the change of mobility to the strain in the channel [6], [7]. A large collection of piezoresistance coefficients has already been published for MOSFETs with different channel materials (Si, Ge, SiGe, ...) [8], [9], inversion surface orientations ((110), (111), (100) for Si and SiGe [10], [11]) or channel crystallographic orientations [12]. Up to now, only a few data are available for multiple gate MOSFETs [13]- [17], for which the impact of scaled dimensions down to ≈10nm can play a significant role.…”

Section: Introductionmentioning

confidence: 99%

“…The crossed symbols (⊗) indicate the values reported in literature for wide (110) and (100) MOSFETs (data from[9],[12]). The bold line corresponds to the model fit for piezoresistive coefficients (see text).…”

mentioning

confidence: 98%

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Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model

Pelloux-Prayer

Cassé

Triozon

et al. 2015

2015 45th European Solid State Device Research Conference (ESSDERC)

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The effect of strain on carrier mobility in triple gate FDSOI nanowires is experimentally investigated through piezoresistance measurements. We propose an empirical model based on simple assumptions that allows fitting the piezoresistive coefficients as well as the carrier mobility for various device geometries. We highlight an enhanced strain effect for Trigate nanowires with channel height below 11nm.

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Section: Piezoresistive Coefficientssupporting

confidence: 87%

Section: Piezoresistive Coefficientsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 98%

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Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model

Pelloux-Prayer

Cassé

Triozon

et al. 2015

2015 45th European Solid State Device Research Conference (ESSDERC)

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“…For nMOSFETs, uniaxial 110 and biaxial tensile strain are found to be particularly efficient [24], [25]. In this work, channels are all aligned along the 110 direction on a (100) wafer, so this is the orientation of the top channel of the triangular cross section.…”

Section: Strain As Booster Of Carrier Mobilitymentioning

confidence: 99%

The High-Mobility Bended n-Channel Silicon Nanowire Transistor

Moselund

Najmzadeh

Dobrosz

et al. 2010

IEEE Trans. Electron Devices

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Abstract-This work demonstrates a method for incorporating strain in silicon nanowire gate-all-around (GAA) n-MOSFETs by oxidation-induced bending of the nanowire channel and reports on the resulting improvement in device performance. The variation in strain measured during processing is discussed. The strain profile in silicon nanowires is evaluated by Raman spectroscopy both before device gate stack fabrication (tensile strains of up to 2.5% are measured) and by measurement through the polysilicon gate on completed electrically characterized devices. Drain current boosting in bended n-channels is investigated as a function of the transistor operation regime, and it is shown that the enhancement depends on the effective electrical field. The maximum observed electron mobility enhancement is on the order of 100% for a gate bias near the threshold voltage. Measurements of stress through the full gate stack and experimental device characteristics of the same transistor reveal a stress of 600 MPa and corresponding improvements of the normalized drain current, normalized transconductance, and low-field mobility by 34% (at maximum gate overdrive), 50% (at g max ), and 53%, respectively, compared with a reference nonstrained device at room temperature. Finally, it is found that, at low temperatures, the low-field mobility is much higher in bended devices, compared with nonbended devices.

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5.8‐inch QHD flexible AMOLED display with enhanced bendability of LTPS TFTs

et al. 2018

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By applying the curve‐type thin film transistor (TFT) with longitudinal strain, TFT parameters do change little down to the 2R bending. The mobility variation range reduces down to 4% compared with 28% of the line‐type channel with transverse strain. The smaller variation is preferred for a high quality display. We clarified that majority carrier's effective mass and scattering rate are dominant factors influencing the bended TFT's performance, which can be controlled by the strain orientation and channel shape. This understanding and improvement was embedded in the 5.8″ flexible QHD active matrix organic light emitting diode panel with multi edge curvature of Galaxy S8. Through this achievement, we made our flexible premium active matrix organic light emitting diode panels more performable, reliable, and highly productive in small R bending circumstance.

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Examination of Additive Mobility Enhancements for Uniaxial Stress Combined with Biaxially Strained Si, Biaxially Strained SiGe and Ge Channel MOSFETs

Cited by 36 publications

References 7 publications

Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model

Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model

The High-Mobility Bended n-Channel Silicon Nanowire Transistor

5.8‐inch QHD flexible AMOLED display with enhanced bendability of LTPS TFTs

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