Experimental analyses of the mechanical reliability of advanced BEOL/fBEOL stacks regarding CPI loading

Geisler, H.; Schuchardt, E.; Brueckner, M.; Hofmann, Petra; Machani, Kashi Vishwanath; Kuechenmeister, Frank; Breuer, D.; Engelmann, Hans‐Jürgen

doi:10.1109/irps.2013.6532030

Cited by 10 publications

(5 citation statements)

References 17 publications

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“…It is immediately apparent that metal density has a stabilizing effect on BEoL metallization structure, as denoted by a significant decrease in the tensile stress experienced by low-κ dielectric, with an optimum at M=70%, as higher metal densities are believed to result in a "pinch effect". Similar results have been found by [2]. …”

Section: Figure 8: Global Modelsupporting

confidence: 91%

“…Aiming to develop and grant maturity milestones, standardized procedures are used to assess the assembly reliability. Among others, bump shear testing is widely adopted to qualify the bumping process [1,2], since it provides a quantitative measure of the bonding strength between solder or copper pillar bumps and pad structure in flip-chip assemblies.…”

Section: Introductionmentioning

confidence: 99%

“…Secondly, the effects of the design and layout (i.e. copper density in interconnect levels) are investigated, since identified to have an impact on pad reliability [2]. Thus, different BEoL metallization densities are studied by varying the metal line width (densities of 30%, 50% and 70%).…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Experimental and numerical investigations on Cu/low-k interconnect reliability during copper pillar shear test

Sart

Gallois-Garreignot

Fiori

et al. 2015

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

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In this work, innovative experiments and failure analysis during copper pillar shear test are described and complemented with simulation. The aims are to, firstly, establish several copper pillar bump failure scenarii and look into the alleged failure mechanisms involved during the shear test. It is accomplished experimentally by carrying out incremental tests on a 28nm CMOS technology test chip. More precisely, the shear tool is stopped at various stages during the test, and the subsequent FIB/SEM cross-sectional views are performed. Three main distinct modes are highlighted and discussed. The second aim of this paper is to investigate the design and layout effects (i.e. copper density in interconnect levels). To do so, different BEoL metallization densities are studied experimentally and numerically. During this dedicated campaign, the three aforementioned failure modes are also observed. Focusing on the cratering mode, which underlines a weakness at the BEoL level, experiments reveal that structures having the lowest metal density are more prone to fail than the balanced ones. Then, simulations are performed to give deeper understanding. Good agreement is found with the experimental observations, which highlights the impact of the BEoL structure on the reliability. Lastly, this work provides a comprehensive understanding of the BEoL behavior under bump shear loading, and enables further design optimization to secure assembly processes of advanced semiconductor technologies.

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Section: Figure 8: Global Modelsupporting

confidence: 91%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Experimental and numerical investigations on Cu/low-k interconnect reliability during copper pillar shear test

Sart

Gallois-Garreignot

Fiori

et al. 2015

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

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“…The overall objective of the methods presented in this work is the determination of BEoL failure modes and the related conditions under which they occur by inducing mechanical load to adjacent electrical connectors. Different methods have been developed and successfully implemented in the industry to serve this purpose, such as the BABSI (Bump assisted BEoL stability indentation) test as well as shear tests [1] , [2] , [3] . Also, the JEDEC standard JESD22-B117 should serve this purpose [4] , it is only applicable to solder balls, however.…”

Section: Methods Detailsmentioning

confidence: 99%

Micromechanical BEoL robustness evaluation methods enabling loading condition customization and acoustic emission damage monitoring

et al. 2023

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“…Bump assisted BEOL stability indentation (BABSI) test has been developed by GLOBALFOUNDRIES to characterize the structural integrity of the BEOL stack and integration schemes. 13,14 The schematic of bump configuration and test methodology are shown in Figure 6. The Cu Pillar bump was indented and followed by a shear test on a patterned wafer with full BEOL stack until mechanical failure model in the curve.…”

Section: Beol Strength Characterizationmentioning

confidence: 99%

Chip Packaging Interaction (CPI) with Cu Pillar Flip Chip for 20 nm Silicon Technology and Beyond

Gao

Smith

Cho

et al. 2014

ECS J. Solid State Sci. Technol.

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Chip packaging interaction (CPI) has drawn great attention to advanced silicon technology nodes due to the introduction of Low-K (LK) and Ultra Low-K (ULK) materials in back end of line (BEOL) and Cu pillar in chip package interconnects. This paper summarizes GLOBALFOUNDRIES's activities in CPI studies for the 20 nm technology node, which includes CPI structure design, BEOL process characterization and optimization, assembly process optimization and reliability tests. The key issues and challenges were identified, analyzed, and overcome through a Design of Experiment (DOE) study in BEOL Q-time and reflow parameters in assembly process. It has been found that 1) BEOL ULK layer Q-time before SiCN capping is critical for moisture diffusion into BEOL materials, which affects both electrical performance and reliability; 2) Reflow temperature plays key role to control the package warpage to avoid non-wet issue. Package level reliability evaluation was performed and the results were reported. Through this study, it has been demonstrated that GLOBALFOUNDRIES's 20 nm technology successfully passed all CPI reliability tests. CPI challenges for future technology nodes and emerging packaging integration solutions are also discussed in the paper.

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Experimental analyses of the mechanical reliability of advanced BEOL/fBEOL stacks regarding CPI loading

Cited by 10 publications

References 17 publications

Experimental and numerical investigations on Cu/low-k interconnect reliability during copper pillar shear test

Experimental and numerical investigations on Cu/low-k interconnect reliability during copper pillar shear test

Micromechanical BEoL robustness evaluation methods enabling loading condition customization and acoustic emission damage monitoring

Chip Packaging Interaction (CPI) with Cu Pillar Flip Chip for 20 nm Silicon Technology and Beyond

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