Experimental and numerical investigation of microvia reliability

Abstract

Dramatic advances in electronic industry have lead to higher VO, finer pitch and smaller footprint off chip interconnects to meet the cost, performance and size requirements. Microvia substrate technologies will play a crucial role in the printed wiring board (PWB) industry to accommodate these high VO chips. A comprehensive experimental and theoretical program is underway at the Georgia Institute of Technology to develop the microvia substrate technologies. The experimental aspect of this program involves fabrication in a class 1000 clean room facility to understand the effect of process parameters on yield and reliability of the microvia and high density wiring (HDW) structures. The theoretical program aims to understand the mechanics of deformation and thus predict and enhance the reliability of the microvia structures. The focus of this paper is a) to characterize the effect of microvia geometry parameters on the evolution of strain and b) to determine the effect of dielectric material property on the thermomechanical reliability of the microvias c) to understand the effect of processing parameters on yield. Parametric Finite element simulations were carried out with different microvia geometry to understand the failure mechanics of these structures. These results are compared with reliability test data obtained from thermal cycling test of the microvias for various microvia diameters from 75 pm to 125 pm. The reliability predictions are compared with thermal cycling test data of the test vehicles. This current study will help to develop upfront design guidelines to fabricate thermomechanically reliable microvias.

High-Density PWB Microvia Reliability for Space Application

“…Control of the copper plating process is a key factor for improving yield and reliability of microvias. [7] Solder is then deposited in the microvia filling the hole.…”

System-Level Reliability Assessment of Mixed-Signal Convergent Microsystems

“…7(a)] and material interaction effects [ Fig. 7(b)] in developing predictive models and up-front design guidelines for SOP system board fabrication [18], [19].…”

Influence of Substrate on Microvia Structures in Printed Circuit Boards During Reflow

“…Microvia reliability research has primarily centered around the core focuses of design optimization and understanding the failure mechanisms of microvias. Some researchers have focused on experimental investigations of the reliability of single level microvias [19], [20]. Some publications have addressed the microvia reliability of single level unfilled or epoxy-filled microvias.…”

“…Birch [25] tested stacked electroplated microvias and found that two-level stacked microvias are relatively more reliable than four-level stacked microvias. Previous research has found different types of failure in microvias including cracks around corners, knees, pads, and interfacial separation [19], [20], [21]. Ning et al [26] investigated the voiding effect on the reliability of copper-filled stacked microvias in detail with different characteristics of voiding such as void shapes, location, and sizes.…”