An enhanced high frequency performance SiC MOSFET with self-adjusting P-shield region potential (SA-MOS) is proposed and characterized in this paper. The potential of P-shield region (ground or floating potential) can be adjusted by a depletion PMOS structure integrated in the SA-MOS. During turn-on of SA-MOS, the channel of integrated PMOS is pinched off and the P-shield region can be at a floating potential. Therefore, SA-MOS shows about 21% specific on-resistance (Ron,sp) reduction as compared to the conventional trench gate SiC MOSFET with grounded P-shield (GP-MOS) due to the retraction of depletion layer in drift region. During turn-off of SA-MOS, the integrated PMOS is turned on and the P-shield region is grounded to the source contact. Thus, the high on-state oxide electric field and slower switching speed caused by the floating P-shield region could be eliminated by SA-MOS structure. Furthermore, the gate-to-drain charge (Qgd) of SA-MOS is only 217 nC/cm2 owing to smaller overlap area between drift region and trench gate, which is about 40% lower than that of GP-MOS. The high frequency figures of merit (HF-FOM= Ron,sp×Qgd) for SA-MOS can be as low as 50% or more of GP-MOS. Finally, an analytical model is also developed to describe the variation of P-shield potential in SA-MOS. With the overall improved performance, SA-MOS shows a significant advantage in high frequency field in comparison with the GP-MOS.