Experimental study of carrier transport in ultra-thin body GeOI MOSFETs

Lee, C. H.; Nishimura, Tomonori; Tabata, Toshiyuki; Zhao, Dan; Ifuku, Ryota; Nagashio, Kosuke; Kita, Koji; Toriumi, Akira

doi:10.1109/soi.2011.6081794

Cited by 21 publications

(17 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The peak hole mobility for the 20-nm-thick-GeOI MOSFETs is 122 cm 2 /Vs with substrate impurity concentration of around 2 × 10 17 cm −3 . This mobility value is 20% higher than that of a GeOI p-MOSFET based on Smart Cut GeOI wafers with 1ower than 2 × 10 14 cm −3 doping concentration and the same Ge layer thickness, 14 which is also shown in Figure 3a. The higher hole mobility in low field of the present 20-nm-thick-GeOI MOSFETs than that of the Smart Cut GeOI MOSFETs could be explained by a decrease of Coulomb scattering due to MOS interface charges at the Ge/BOX interfaces, which could be induced by the better interfacial properties of the Ge/GeO x interface introduced by plasma post oxidation than those of the Ge/SiO 2 interface in the commercial GeOI.…”

mentioning

confidence: 51%

“…12 This weaker mobility degradation with thinning GeOI thickness for the present devices might be attributable to the better MOS interface quality with BOX by using the GeO x /Ge interface, which is evident in the high mobility in bulk Ge MOSFETs with the same interface. 9,10 The comparison between the mobility of present devices and the back channel mobility of the Smart Cut devices (Ge/SiO 2 interface) 14 is also shown in Figure 3c. The higher mobility of the present devices suggests that the Ge/BOX interface properties have been improved by the Ge/GeO x interfaces formed by the present method.…”

mentioning

confidence: 92%

“…[7][8][9][10][11] Also, ultrathin body (UTB) Ge-on-insulator (GeOI) structures are strongly needed to enhance the immunity against short channel effects, which is mandatory for scaled MOSFETs. 12 However, the effective mobility of MOSFETs on GeOI wafers fabricated by Smart Cut has been reported to be lower than expected for the Ge thickness less than 20 nm, 13,14 which might be caused by crystal defects near the Ge/buried oxide (SiO 2 ) interfaces generated during the GeOI fabrication process, and/or some residual damages originating from hydrogen implantation. 15,16 Therefore, high quality GeOI substrate formation is a key to realize good performance in UTB GeOI devices.…”

mentioning

confidence: 99%

See 2 more Smart Citations

Ultrathin Body Germanium-on-Insulator (GeOI) Pseudo-MOSFETs Fabricated by Transfer of Epitaxial Ge Films on III-V Substrates

Zhang

Kang

et al. 2014

ECS Solid State Letters

View full text Add to dashboard Cite

mentioning

confidence: 51%

mentioning

confidence: 92%

mentioning

confidence: 99%

See 1 more Smart Citation

Ultrathin Body Germanium-on-Insulator (GeOI) Pseudo-MOSFETs Fabricated by Transfer of Epitaxial Ge Films on III-V Substrates

Zhang

Kang

et al. 2014

ECS Solid State Letters

View full text Add to dashboard Cite

“…Moreover, the strain engineering in Ge thin layer via Sn alloying may have also positive influence on the carrier mobility. Figure 4 shows the comparison between our best obtained results and single crystalline GeOI made by Smart Cut and epitaxial layer transfer method [22,23]. In the case of n-type GeOI, the epitaxial Ge and GeOI made by SmartCut method have much higher electron mobility than our samples.…”

Section: Resultsmentioning

confidence: 76%

Enhancement of carrier mobility in thin Ge layer by Sn co-doping

Prucnal

Liu

Berencén

et al. 2016

Semicond. Sci. Technol.

View full text Add to dashboard Cite

We present the development, optimization and fabrication of high carrier mobility materials based on GeOI wafers co-doped with Sn and P. The Ge thin films were fabricated using plasma-enhanced chemical vapour deposition followed by ion implantation and explosive solid phase epitaxy, which is induced by millisecond-range flash lamp annealing. The influence of the recrystallization mechanism and co-doping of Sn on the carrier distribution and carrier mobilities both in the n-type and in the p-type GeOI wafers is discussed in details. This finding significantly contributes to the state of the art of high carrier mobility-GeOI wafers since the results are comparable with GeOI commercial wafers fabricated by epitaxial layer transfer or Smart Cut technology.

show abstract

“…11 summarizes the full width at half maximum (FWHM) values of (111) and (100) GOI substrates as a function of TGOI. FWHM values of UTB GOI layers, reported previously, are also added as references [18,19]. An increase in FWHM values is commonly observed in UTB regions.…”

Section: Resultsmentioning

confidence: 98%

Electrical Properties of Ultra-Thin Body (111) Ge-On-Insulator n-Channel MOSFETs Fabricated by Smart-Cut Process

Lim

Zhao

Sumita

et al. 2021

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

We have systematically examined electrical characteristics of ultra-thin body (UTB) (111) Ge-on-insulator (GOI) n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) fabricated by the smart-cut process and have compared their electrical properties with those of (100) ones. The (111) GOI thickness was varied from 29.4 to 7.3 nm. The normal MOSFET operation of a 7.3 nm-thick (111)-oriented GOI nMOSFET has been demonstrated with a reasonable ON/OFF ratio of 10 4 . However, degradation in the effective electron mobility and subthreshold swing (SS) of the (111) GOI nMOSFETs with decreasing the GOI thickness (TGOI) was observed. Raman analyses and electrical characteristics of GOI nMOSFET under back-gate operation has suggested that a high interface state density at (111) GOI/buried oxide interfaces as well as low GOI film quality near the back interfaces can be an origin of this degradation of the electrical properties with thin body channels.Index Terms-Ge-on-insulator (GOI), smart-cut technology, (111) surface orientation, MOSFETs, ultra-thin body (UTB) I. INTRODUCTIONS conventional Si-based complementary metal-oxidesemiconductor (CMOS) devices have encountered with physical limitations of scaling down, Ge has been studied as an alternative channel material due to its high carrier mobility and compatibility with the conventional Si CMOS technology [1][2][3]. In scaling down Ge MOS devices, an ultra-thin body (UTB) GOI structure is essential for strong immunity against shortchannel effects [4][5][6]. Recently, GOI MOSFETs, which can be realized under low thermal budget, have become more attractive because of the applicability to 3-dimensional stacked CMOS, promising as a future CMOS platform [7,8]. Here, the further improvement in electrical characteristics of n-channel GOI MOSFETs is one of the main challenges in developing the GOI CMOS. Thus, technology boosters to realize highperformance UTB GOI nMOSFETs is strongly needed.In order to enhance the GOI nMOSFET performance, the surface orientation must be carefully taken into account because of the anisotropic carrier transport properties of Ge [9]. Here, the (111) surface orientation of Ge has lower effective mass Manuscript received February xx, 2021.

show abstract

Experimental study of carrier transport in ultra-thin body GeOI MOSFETs

Cited by 21 publications

References 1 publication

Ultrathin Body Germanium-on-Insulator (GeOI) Pseudo-MOSFETs Fabricated by Transfer of Epitaxial Ge Films on III-V Substrates

Ultrathin Body Germanium-on-Insulator (GeOI) Pseudo-MOSFETs Fabricated by Transfer of Epitaxial Ge Films on III-V Substrates

Enhancement of carrier mobility in thin Ge layer by Sn co-doping

Electrical Properties of Ultra-Thin Body (111) Ge-On-Insulator n-Channel MOSFETs Fabricated by Smart-Cut Process

Contact Info

Product

Resources

About