Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

Abstract

The recent increasing demand of Silicon-on-Chip devices has had a significant impact on the industrial processes of leading semiconductor companies. The semiconductor industry is redesigning internal technology processes trying to optimize costs and production yield. To achieve this target a key role is played by the intelligent early wafer defects identification task. The Electrical Wafer Sorting (EWS) stage allows an efficient wafer defects analysis by processing the visual map associated to the wafer. The goal of this contribution is to provide an effective solution to perform automatic evaluation of the EWS defect maps. The proposed solution leverages recent approaches of deep learning both supervised and unsupervised to perform a robust EWS defect patterns classification in different device technologies including Silicon and Silicon Carbide. This method embeds an end-to-end pipeline for supervised EWS defect patterns classification including a hierarchical unsupervised system to assess novel defects in the production line. The implemented "Unsupervised Learning Block" embeds ad-hoc designed Dimensionality Reduction combined with Clustering and a Metrics-driven Classification sub-systems. The proposed "Supervised Learning Block" includes a Convolutional Neural Network trained to perform a supervised classification of the Wafer Defect Maps (WDMs). The proposed system has been tested and validated on different datasets, showing effective performance in the classification of the defect patterns (average accuracy about 97%).

Deep Learning for Automatic Vision-Based Recognition of Industrial Surface Defects: A Survey

“…A large and diversified dataset with resampled and combined representations helps the recognition network to learn new features, with an increased robustness on never-seen-before defects. Three major methods tackling hard sample mining at image-level are recurrent: 1) image-level linear transformation: it consists of an augmentation on the training set by scaling, rotating, translating, flipping, cropping or zooming, height and width shifting [51], [83], [87], [91], [92], [93]. Martinez et al [73] augment their dataset of functional anomalies of screw fastening process through horizontal flipping and random rotation.…”

Silicon Carbide: Physics, Manufacturing, and Its Role in Large-Scale Vehicle Electrification

“…The Electrical Wafer Sorting (EWS) stage allows an efficient wafer defect analysis by automatically processing the visual map associated with the wafer. The solution proposed by some authors [7] leverages recent approaches of both supervised and unsupervised deep learning to conduct a robust EWS defect classification in different technologies including silicon carbide. This method embeds an end-to-end pipeline for supervised EWS defect pattern classification, including a hierarchical unsupervised system to assess novel defects in the production line.…”

“…The Electr Wafer Sorting (EWS) stage allows an efficient wafer defect analysis by automatically p cessing the visual map associated with the wafer. The solution proposed by some auth [7] leverages recent approaches of both supervised and unsupervised deep learning…”