Exploiting Approximate Computing for implementing Low Cost Fault Tolerance Mechanisms

Bosio, Alberto; O’Connor, Ian; Rodrigues, Gennaro S.; Lima, F.; Hamdioui, Said

doi:10.1109/dtis48698.2020.9081268

Cited by 4 publications

(1 citation statement)

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“…Approximate computing techniques [14] relax accuracy requirements to reduce complexity, improve energy efficiency and increase performance. The use of approximate computing to implement efficient fault tolerant architectures is discussed in [20]. In Digital Signal Processing (DSP), approximation is commonly used in many ways, such as sampling, quantization, or decimation.…”

Section: Related Workmentioning

confidence: 99%

Analyzing Reduced Precision Triple Modular Redundancy Under Proton Irradiation

García-Astudillo

Entrena

Lindoso

et al. 2022

IEEE Trans. Nucl. Sci.

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This work analyzes the performance of the Reduced Precision Redundancy (RPR) error mitigation technique using the Fast Fourier Transform (FFT) as a case study. To this purpose, several configurations of an FFT IP design were implemented in FPGA using Reduced Precision TMR and tested under proton irradiation and fault injection. The cross-section, the sensitivity to Common-Mode Failures (CMFs) and the signal-to-noise ratio of these configurations were evaluated. The results of the radiation experiments and fault injection campaigns are in agreement and show that the Reduced Precision TMR technique may be used as an alternative to TMR if small errors can be tolerated, as it has a good performance in terms of error correction capabilities, area usage and sensitivity to critical errors.

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Section: Related Workmentioning

confidence: 99%