Exploiting hysteresis in a CMOS buffer

Transparent repeaters

“…Maintaining the same segment delay D1, the length of the line segment can be increased since the signal has to only reach the low threshold voltage of an HDR buffer [5]. A consequence of this capability is that the line can be partitioned into only g segments with g smaller than k. The delay of the HDR buffer DHDR must also be minimized to minimize Dh.…”

“…The efficiency of the line driven by the TR buffers can be further improved if the TR buffers incorporate low switching threshold voltages as in an HDR buffer [5]. If these low switching threshold voltage TR buffers drive a highly resistive RC line as shown in Fig.…”

“…Therefore, the TR circuit significantly reduces the total delay of the line as compared to classical repeater [3] or HDR buffer insertion methodologies [5]. The name of the proposed circuit is intended to suggest that inserting a TR along the RC line introduces zero delay into the signal path, and therefore the repeater is transparent to the signal.…”

“…If these low switching threshold voltage TR buffers drive a highly resistive RC line as shown in Fig. 2, and if the same delay D1 is maintained for the TR buffer to reach the low switching threshold voltages as for the IB buffer to reach the IB threshold voltages, the line can be partitioned into less segments, possibly less segments than k. If m is the number of segments into which the line driven by the low threshold voltage TR buffers is partitioned, the total delay of the line is DTR = m, Di, (5) and the gain in delay as compared to a classical repeater insertion process as expressed by (1) is…”

“…Values for k, DB, and the IB buffer size exist to obtain the minimal delay and power dissipation to optimally drive an RC interconnect line [3]. The minimal delay of the line can be further improved using an HDR buffer [5], which has a voltage transfer characteristic (VTC) with low switching threshold voltages and hysteresis. Briefly, the HDR buffer detects an input transition with a low threshold voltage (for example, for a 5 volt system, the lowto-high signal transitions at 1 volt instead of approximately 3 volts for an inverter, and tile high-to-low signal transitions at 4 volts instead of approximately 2 volts for an inverter).…”