Exploring the Performance Limit of Carbon Nanotube Network Film Field‐Effect Transistors for Digital Integrated Circuit Applications

Abstract

Carbon nanotube (CNT) network thin film field-effect transistors (TFTs), which used to be considered as low cost and low performance transistors for display driving or flexible electronics, have recently been used to construct digital integrated circuits (ICs). However, few studies have focused on exploring how optimal CNT TFTs can be achieved according to transistor standards in digital applications. In this work, sub-micrometer TFTs based on high-quality and high-purity solution-derived CNT films are fabricated and the potential performance restriction due to the switching-off property of these transistors is explored. Specifically, subthreshold swing (SS) severely degrades upon scaling down the channel length or increasing the CNT density in TFTs, and a tradeoff between peak transconductance (g m ) and SS in CNT TFTs due to the random orientation distribution of CNTs has been observed in experiments and proven by theoretical simulations. A welldesigned balance between g m and SS is necessary to build CNT TFTs with SS of 120 mV dec −1 and g m of 150 µS µm −1 to meet device requirements in digital ICs powered by a supplied voltage, V DD , lower than 2.0 V.The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/adfm.201808574. Results and DiscussionSingle-walled CNT (SWCNT) solution-derived films with an ultrahigh semiconducting purity (99.99%) were prepared on a Thin Film FETs

Aligned, high-density semiconducting carbon nanotube arrays for high-performance electronics

“…"Purified-and-placed" solution-processed CNT materials can provide CNTs with high semiconducting purity. This approach is simple and scalable, and it could provide waferscale assembly capability (12)(13)(14)(15)(16)(17)(18), but challenges remain. The current level of semiconducting purity of 99.99% must be improved to 99.9999% by further sorting CNTs and upgrading the purity characterization method.…”

Advances in High‐Performance Carbon‐Nanotube Thin‐Film Electronics

“…A severe tradeoff between SS and g m is often found in FETs based on solution‐processed network CNTs. In 2018, Zhao et al explored the performance limit of CNT network film FET transistors for digital applications by channel length scaling from 500 to 120 nm . Figure shows that tube–tube junctions that lead to degradation of FET performance severely when decreasing L ch .…”

“…The solid lines show the industrial standard of an FET for a digital IC at different V DD values. Reproduced with permission . Copyright 2019, Wiley‐VCH.…”

“…In CMOS technology, p‐type and n‐type MOS FETs with symmetrical V TH and suitable absolute value are required to achieve perfect logic output and lowest static power dissipation . V TH variation in CNT thin film FETs is mainly attributed to CNT diameter distribution, randomness of CNT length in the channel, and process‐induced nonuniformity . Because of the diameter distribution (1.1 – 1.6 nm) of CNTs, their band gaps are mostly in the range of 0.5–0.8 eV, so V TH is usually set to <0.6–0.8 V under the working voltage V dd < 2 V to balance the drive ability of I on and static power consumption or off‐state current I off of the transistors for high performance digital ICs.…”

Interfacial Contact Behavior between CNTs and AgNW with Molecular Dynamics Simulation

“…They have unique hollow structures and exceptional electrical, thermal, mechanical and optical properties, showing limitless applications in the integrated circuit, flexible electronics, heterogeneous catalysis, and composite fields, among others. [1][2][3][4][5][6][7][8][9][10][11][12]. In the innovative exploration of the behaviors of CNTs, the pristine tubular structure is easily changeable under the influence of external factors.…”