Fabrication and characteristics of 0.12 µm AlGaAs/InGaAs/GaAs pseudomorphic HEMT using a silicon nitride assisted process

InP-based InAlAs/In x Ga 1−x As/InP high-electron-mobility transistors (HEMTs) with a symmetrically graded channel (SGC-HEMT) and an inversely graded channel (IGC-HEMT) were fabricated and studied. The SGC-HEMT exhibits better Hall, dc and RF characteristics than the IGC-HEMT because there are more electrons accumulated in the symmetrically graded channel. However, the IGC-HEMT has better thermal stability than the SGC-HEMT because the former has higher bandgap discontinuity at the channel/buffer heterojunction and less Coulomb scattering from a δ-doped layer. Furthermore, the IGC-HEMT sustains larger output power than the SGC-HEMT attributed to better breakdown characteristics. Therefore, HEMTs with the symmetrically graded and an inversely graded channel are suitable for high-speed and high-power applications, respectively.

Section: Introductionmentioning

confidence: 99%

Comparative study of In_0.52Al_0.48As/In_xGa₁₋_xAs/InP high-electron-mobility transistors with a symmetrically graded and an inversely graded channel

Huang

Hsu

Lin

et al. 2006

“…As mentioned earlier, the Schottky diodes under consideration are based on pre-fabricated double-gate finger pHEMT structures [15]. Two different gate widths of 120 μm and 200 μm are chosen which are designated as pHSD120 and pHSD200, respectively.…”

Section: Phemt Schottky Diodes' Design and Fabricationmentioning

confidence: 99%

“…At this frequency range C a , C c and L s have little effect on the pHEMT Schottky diode. It is pure resistance so it can be represented as (15). With this, R T can be extracted using (16) and R j can be obtained from DC measurement at the chosen bias point.…”

Section: Phemt Schottky Diode Equivalent Circuit Modelmentioning

confidence: 99%

Design and characterisations of double-channel GaAs pHEMT Schottky diodes based on vertically stacked MMICs for a receiver protection limiter

Haris

Kyabaggu

Rezazadeh

2016

A microwave receiver protection limiter circuit has been designed, fabricated and tested using vertically stacked GaAs MMIC technology. The limiter circuit with a dimension of 2.5 × 1.3 mm 2 is formed by using double-channel AlGaAs/InGaAs pseudomorphic HEMT (pHEMT) Schottky diodes integrated with a low-loss V-shaped coplanar waveguide multilayer structure. The electrical parameter characteristics of the pHEMT Schottky diodes are presented including the C-V profile showing the presence of a double channel in the device layer structure. This unique feature can also be seen from the double-peak responses of the electron density as a function of the device layer width, which represent the high electron concentration at two different 2-DEG layers of the structure. An equivalent circuit model of pHEMT Schottky diodes is demonstrated showing good agreement with the measurement results. At zero-bias condition, the devices show high performance in diode detector applications with voltage sensitivities of more than 89 mV μW −1 at 10 GHz and at least 5.4 mV μW −1 at 35 GHz. The measurement results of the limiter circuit demonstrated the blocking of input power signals greater than 20 dBm input power at 3 GHz. To the best of our knowledge this is the first demonstration of the use of pHEMT Schottky diodes in microwave power limiter applications.

“…In this paper, we propose and prove an alternate method of engineering gate recess structure with any base width of interest by a silicon-nitride-assisted process. Silicon-nitrideassisted process was used in the past for different purposes such as realization of T-gate, etc [24][25][26]. But, in this paper, we use the silicon nitride layer as a replacement layer to the bottom photoresist layer in bi-layer lithography.…”

Section: Introductionmentioning

confidence: 99%

Gate recess structure engineering using silicon-nitride-assisted process for increased breakdown voltage in pseudomorphic HEMTs

Bhat¹,

Mandal²,

Pathak³

et al. 2012

We report the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure of any width of choice, by a single lithography and etching step with the help of silicon-nitride-assisted process. In this process, a silicon nitride layer is deposited prior to gate lithography. First, the silicon nitride is etched by buffered hydrofluoric acid (BHF) in the gate opening and then selective recessing is performed. The recess base width can be engineered by varying etch time of silicon nitride in BHF. The base width increases linearly with etch time as shown by SEM. We demonstrate that the top photoresist gate opening that decides the gate length is unaffected by any duration of silicon nitride etch time. Thereby, we have engineered the distance from gate edge to n + -GaAs (L gn+ ) which decides the gate-to-drain breakdown voltage (BV gd ). With this method, BV gd increased from 12 to 20 V as a function of L gn+ . The electric field distribution across the recess structure has been simulated to interpret this result. Since the high BV gd of pHEMT is essential for power applications as well as switch applications, this method can be easily adopted even though the corresponding reduction in transconductance and unit current gain cut-off frequency (f t ) is only marginal from 375 to 350 mS mm −1 and from 39 to 31 GHz, respectively.