Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction

Abstract

A new type of ferroelectric gate field-effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. The channel region of the FET is composed of a Pt/insulator HfO 2 /ferroelectric Pb(Zr 0:52 Ti 0:48 )O 3 (PZT)/Pt/TiO 2 /SiO 2 /Si multilayer, and the source and drain areas are formed at the interface of the PZT and HfO 2 films. Drain current versus gate voltage characteristics show a clockwise hysteresis loop similar to that for a conventional p-channel transistor. The FET shows that the on/off ratio of the conduction current is within 10 5 to 10 6 and that the off-state current is about 10 À10 A.

Nonvolatile Memory Using Epitaxially Grown Composite-Oxide-Film Technology

“…[5][6][7] For example, a FeFET with an insulator/ferroelectric structure having drain and source electrodes at the interface has been formed on a bottom gate electrode of Pt. 6) The drain currents of this FeFET show hysteresis loops and a maximum on-current/off-current (I on =I off ) ratio of higher than 10 5 is obtained by applying a certain gate voltage. However, the difference in the drain currents between the binary states at a zero gate voltage, which is indispensable for nonvolatile memories, is not sufficiently large owing to a shift in the threshold voltage.…”

Application of Perovskite‐Structured Materials in Field‐Effect Transistors

“…The extrapolation of the retention behavior predicted a specific memory window of >10 years. [174] In another work by Lee et al, [42] semiconductor was avoided since drain current can flow along the interface between the ferroelectric and insulator layers. [166] Miyasako et al [173] fabricated FeFET via a chemical solution deposition process, which typically needs low instrumental and operational costs compared to sputtering, pulsed laser deposition, and chemical vapor deposition.…”

“…This difficulty is interpreted by the depolarization field instability . The interface between the perovskite ferroelectric and a semiconductor such as Si is relatively difficult to control because it can induce an interface oxide layer . Any imperfection at the interface, such as the formation of undesirable phases or electronic trapping states, will cause considerable degradation of the device performance.…”

“…This is a good example for the field‐effect enabled colossal magnetoresistance (CMR) type materials in FeFET type of device structures . In another work by Lee et al, semiconductor was avoided since drain current can flow along the interface between the ferroelectric and insulator layers. The authors introduced a new type of FeFET device using 0.52‐doped PZT as ferroelectric gate and HfO 2 as an insulator.…”

“…Oxide perovskite materials (Figure a) are also promising ferroelectric FET (FeFET) materials. One‐transistor‐type ferroelectric random‐access memory (FeRAM) device has attracted considerable attention because it can further improve the RAM integration level compared with the conventional one‐transistor/one‐capacitor FeRAM . FeFETs permit a nondestructive memory readout because it can be interrogated by reading the conductance of the semiconductor channel .…”