2005
DOI: 10.1109/led.2005.851132
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Fabrication and characterization of InGaP/GaAs heterojunction bipolar transistors on GOI substrates

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Cited by 21 publications
(11 citation statements)
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“…5 GeOI/Si substrates have been successfully fabricated using Smart-Cut™ technology. 4,6 Essential features of these substrates include compatibility with Si CMOS fabrication processes, easy electrical isolation, and a lattice constant suitable for integration of III-V devices.…”
Section: Introductionmentioning
confidence: 99%
“…5 GeOI/Si substrates have been successfully fabricated using Smart-Cut™ technology. 4,6 Essential features of these substrates include compatibility with Si CMOS fabrication processes, easy electrical isolation, and a lattice constant suitable for integration of III-V devices.…”
Section: Introductionmentioning
confidence: 99%
“…GOI wafers are expected to be a promising platform for growing different III-V-based device structures. The work of Thomas et al [113] proves it as an example. According to the authors, they first demonstrate the growth, fabrication and dc device characterization of InGaP/GaAs HBTs (heterojunction bipolar transistors) on germanium-on-insulator substrates having comparable device performance to control structures fabricated on GaAs substrates and bulk Ge substrates.…”
Section: Non-epitaxial Iii-v-on-si Techniques (Bonding)mentioning
confidence: 89%
“…The direct growth of III-V-on-silicon is particularly challenging due to large lattice mismatch (4%) between GaAs and Si, and the polar/non-polar nature of the III-V/IV system, which generates a large density of dislocations and anti-phase domains (APDs), respectively. Over the years, between various techniques developed in order to reduce dislocation density [6][7][8][9][10][11][12], the use of Si substrates overgrown with a Ge layer of graded [13] or constant composition [14,15] has attracted a lot of attention for the monolithic integration of III-V devices on Si, because Ge is both almost lattice-matched to GaAs and compatible with the Si CMOS technology.…”
Section: Introductionmentioning
confidence: 99%