1983 International Electron Devices Meeting 1983
DOI: 10.1109/iedm.1983.190562
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Fabrication demonstration of 1-1.5µ NMOS circuits using optical tri-level processing technology

Abstract: A n improved optical (DSW) tri-level processing technology was utilized to produce a variety of highperformance 1-1.5p NMOS circuits, including (a) functionally perfect chips of a 4K SRAM with estimated access times of 5 nsec, (b) 16-bit multiplier chips with multiply times of 21-40 nsec (clock rate, 47-25 MHz), and (c) optical fiber amplifier chips operating at 800 Mbit/sec.

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“…The second alternative has no such basic limitations. Increasing the top speed of multivibrators can be done at the fabrication level by use of a fineline MOS process like in reference [5] and at the circuit level by appropriate techniques. These will be discussed next.…”
Section: High-speed Wide-band Strategiesmentioning
confidence: 99%
“…The second alternative has no such basic limitations. Increasing the top speed of multivibrators can be done at the fabrication level by use of a fineline MOS process like in reference [5] and at the circuit level by appropriate techniques. These will be discussed next.…”
Section: High-speed Wide-band Strategiesmentioning
confidence: 99%