Fabrication of Enhancement-Mode AlGaN/GaN MISHEMTs by Using Fluorinated $ \hbox{Al}_{2}\hbox{O}_{3}$ as Gate Dielectrics

Chen, Chao; Liu, Xingzhao; Tian, Benlang; Shu, Pengcheng; Chen, Yuanfu; Zhang, Wanli; Jiang, Hongchuan; Li, Yanrong

doi:10.1109/led.2011.2162933

Cited by 35 publications

(12 citation statements)

References 8 publications

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“…La 2 O 3 [137], Pr 2 O 3 [138], Ga 2 O 3 [139], ZrO 2 [140] and HfO 2 [15,139,141] have all been reported, however it is Al 2 O 3 which is the most widely investigated candidate to date [14,18,139,141,142,143,144]. For all of these dielectrics, reduced gate leakage of the MOS-HEMT compared to that of the Schottky HEMT is reported, with additional benefits such as higher drain current, increased immunity to current collapse, increased transconductance and higher breakdown voltage also reported [14,15,18,137,138,139,140,141,142,143,144,145,146]. Once again, ALD shows promising results with one recent report demonstrating reduced trap states at the Al 2 O 3 /AlGaN interface when compared to MOCVD-grown Al 2 O 3 or oxidation of a thin Al surface layer to form Al 2 O 3 [14].…”

Section: Discussionmentioning

confidence: 99%

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Long

McIntyre

2012

Materials

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The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

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Section: Discussionmentioning

confidence: 99%

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Long

McIntyre

2012

Materials

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“…Nevertheless, samples A and B appear to suffer from a reduction of the drain current ( I D ). This indicates that a deep recess induces a decrease in density of 2‐DEG and that some of the fluorine atoms diffuse into the channel, causing a scattering of electrons . The estimated Subthreshold slope (SS) of samples A, B, and C were 105, 124, and 70 mV/decade, respectively, with an on/off current ratio of more than nine‐orders of magnitude.…”

Section: Resultsmentioning

confidence: 99%

Normally‐off GaN MIS‐HEMT using a combination of recessed‐gate structure and CF₄ plasma treatment

Park

Kim

Chang

et al. 2015

Physica Status Solidi (a)

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The combination of a recessed-gate structure and CF 4 plasma treatment was studied to realize a normally-off operation of a AlGaN/GaN metal-insulator-semiconductor high-electronmobility transistor (MIS-HEMT) for power electronics applications. We verified that fluorine ions incorporated with a strong electronegativity increase the threshold voltage (V th ).In addition, CF 4 plasma treatment slightly etches the AlGaN surface as deeply as 25 Å. A fabricated device exhibits a threshold voltage of as high as 2.6 V. Using a combination of gate recess and plasma treatment processes, the device demonstrates a tremendous potential of normally-off AlGaN/GaN MIS-HEMTs for power electronics applications.

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“…Although direct comparisons between results from different groups are awkward due to differences in device layout, processing steps, etc., recent advances and publications in the field for D-and E-mode GaN-based MISHFET devices show that higher drain currents and peak transconductances are achievable (1550 mA/mm and 330 mS/mm, respectively, for the D-mode, 28 and 1130 mA/ mm (Ref. 29) and 153 mS/mm for E-mode 10 ) through further device optimisation.…”

Section: â 10mentioning

confidence: 99%

“…The E-mode MISHEMTs exhibited high transconductance (153 mS/mm) and large saturated drain currents (547 mA/mm) when the plasma treatment was performed on the dielectric surface. 10 It was reported that the F-distribution was confined to the top 2 nm of the dielectric and furthermore avoided plasma-induced damage at the interface with the III-nitride. Zhang et al 4 have reported the compensation of the intrinsic positive charges in Al 2 C left the F-distribution almost unchanged.…”

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confidence: 99%

Control of threshold voltage in E-mode and D-mode GaN-on-Si metal-insulator-semiconductor heterostructure field effect transistors by in-situ fluorine doping of atomic layer deposition Al2O3 gate dielectrics

Roberts

Chalker

Lee

et al. 2016

Applied Physics Letters

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We report the modification and control of threshold voltage in enhancement and depletion mode AlGaN/GaN metal-insulator-semiconductor heterostructure field effect transistors through the use of in-situ fluorine doping of atomic layer deposition Al2O3. Uniform distribution of F ions throughout the oxide thickness are achievable, with a doping level of up to 5.5 × 1019 cm−3 as quantified by secondary ion mass spectrometry. This fluorine doping level reduces capacitive hysteretic effects when exploited in GaN metal-oxide-semiconductor capacitors. The fluorine doping and forming gas anneal also induces an average positive threshold voltage shift of between 0.75 and 1.36 V in both enhancement mode and depletion mode GaN-based transistors compared with the undoped gate oxide via a reduction of positive fixed charge in the gate oxide from +4.67 × 1012 cm−2 to −6.60 × 1012 cm−2. The application of this process in GaN based power transistors advances the realisation of normally off, high power, high speed devices.

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Fabrication of Enhancement-Mode AlGaN/GaN MISHEMTs by Using Fluorinated $ \hbox{Al}_{2}\hbox{O}_{3}$ as Gate Dielectrics

Cited by 35 publications

References 8 publications

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Normally‐off GaN MIS‐HEMT using a combination of recessed‐gate structure and CF₄ plasma treatment

Control of threshold voltage in E-mode and D-mode GaN-on-Si metal-insulator-semiconductor heterostructure field effect transistors by in-situ fluorine doping of atomic layer deposition Al2O3 gate dielectrics

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Fabrication of Enhancement-Mode AlGaN/GaN MISHEMTs by Using Fluorinated $ \hbox{Al}_{2}\hbox{O}_{3}$ as Gate Dielectrics

Cited by 35 publications

References 8 publications

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Normally‐off GaN MIS‐HEMT using a combination of recessed‐gate structure and CF4 plasma treatment

Control of threshold voltage in E-mode and D-mode GaN-on-Si metal-insulator-semiconductor heterostructure field effect transistors by in-situ fluorine doping of atomic layer deposition Al2O3 gate dielectrics

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Normally‐off GaN MIS‐HEMT using a combination of recessed‐gate structure and CF₄ plasma treatment