Fabrication of III–V on Insulator Structures on Si Using Microchannel Epitaxy with a Two-Step Growth Technique

Abstract

We report a new microchannel epitaxy (MCE) technique for forming III–V semiconductor on insulator (III–V-OI) structures on a Si substrate with a thermally oxidized SiO2 mask for high performance n-type metal–insulator–semiconductor field-effect transistors (MISFETs). To reduce dislocations and antiphase domains (APDs), we propose a novel fabrication method of forming III–V-OI structures, where a two-step growth method is combined with MCE. The growth temperature of the low-temperature buffer layers and the growth rate in the two-step growth are optimized to meet the competing requirements for the reduction in APDs and selective growth. We demonstrate a fabrication of high-quality GaAs-OI structures using our proposed growth method under an optimized growth condition.

Selective growth of InSb on localized area of Si(100) by molecular beam epitaxy

“…By using this technique, the selective lateral growth of III-V compound semiconductor, such as GaAs, InGaAs, InP, and GaN, has been reported [3][4][5][6][7].…”

Uniformity improvement of selectively-grown InGaAs micro-discs on Si

“…III-V epitaxial growth on silicon has recently attracted increasing attention for heterogeneous integration of electronic and photonic devices, in order to take advantage of compatibility with advanced Si integrated circuits and to make the best use of Si wafers with large size and robustness [1][2][3][4][5][6][7][8]. InGaAs is an especially desirable material for n-channel MOSFETs because of its much higher electron mobility than Si.…”

Twin-free InGaAs thin layer on Si by multi-step growth using micro-channel selective-area MOVPE

“…Integration of III-V compound semiconductors on Si has been pursued for the application to the channel layer of the next generation of high speed n-metal-insulator-semiconductor field effect transistors (n-MISFETs) using the well-established Si platform [1][2][3][4][5]. In terms of channeling of electrons, III-V layers have to be thin with small dislocation density.…”

“…Heteroepitaxy using selective-area growth (SAG) [6][7][8][9][10][11][12][13] is a desirable approach to realize such integration because (1) it is a self-aligned process, therefore, the growth position can be decided in advance, (2) it is easy to obtain thin films by controlling a growth rate and/or a growth time, (3) dislocations and defects, generated by the difference in lattice constants and thermal expansion coefficients between a III-V layer and Si, can be avoided by restricting the growth area to a smaller one. In the case of heteroepitaxy of III-V semiconductors on Si, threedimensional nuclei tend to appear at the initial stage of the growth [14][15][16].…”