2020
DOI: 10.1088/1361-6528/abb559
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Fabrication process and failure analysis for robust quantum dots in silicon

Abstract: We present an improved fabrication process for overlapping aluminum gate quantum dot devices on Si/SiGe heterostructures that incorporates low-temperature inter-gate oxidation, thermal annealing of gate oxide, on-chip electrostatic discharge (ESD) protection and an optimized interconnect process for thermal budget considerations. This process reduces gate-to-gate leakage, damage from ESD, dewetting of aluminum and formation of undesired alloys in device interconnects. Additionally, cross-sectional scanning tra… Show more

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Cited by 23 publications
(13 citation statements)
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“…Transmission electron microscope (TEM) images of gate stack in quantum dot devices made in academic laboratories a) UNSW, and b) University of Wisconsin; [ 130 ] and in foundries c) Intel, [ 97 ] d) IMEC. [ 131 ] Reproduced with permission.…”
Section: Overview Of Materials Choicesmentioning
confidence: 99%
See 1 more Smart Citation
“…Transmission electron microscope (TEM) images of gate stack in quantum dot devices made in academic laboratories a) UNSW, and b) University of Wisconsin; [ 130 ] and in foundries c) Intel, [ 97 ] d) IMEC. [ 131 ] Reproduced with permission.…”
Section: Overview Of Materials Choicesmentioning
confidence: 99%
“…[ 131 ] Reproduced with permission. [ 97,130,131 ] Copyright 2020, IOP Publishing. Copyright 2021, The Authors, published by arXiv.…”
Section: Overview Of Materials Choicesmentioning
confidence: 99%
“…29 Above the semiconductor itself, electrostatic potentials applied to multiple layers of overlapping gates confine the electrons. The choice and thickness of gate dielectric, 30 gate metal, 31,32 and inter-gate insulation layer, 33 as well as the different interfaces in the device, 34,35 are all critical aspects of the device design that can impact its performance. Analogous issues associated with materials choices, interfaces, defects, and fabrication processes affect all types of qubit technologies.…”
Section: Materials Science Opportunitiesmentioning
confidence: 99%
“…Electron beam lithography was used to pattern three layers of overlapping aluminum gates isolated from one another by the plasma-ash enhanced self-oxidation of the aluminum metal, following the procedure described in Ref. [25]. (See Methods.)…”
mentioning
confidence: 99%