Abstract:Silicon-compatible micromachining provides a low cost monolithic solution for the integration of microelectromechanical systems (MEMS). In the last years, C M P (the French MultiProject Wafer Service) has made available technological solutions f o r the fabrication of CMOS-compatible MEMS. Numerous monolithic devices have been fabricated using this service. The inspection of failed devices has allowed the identification of the most typical failure mechanisms and design errors f o r this type of MEMS. This valu… Show more
“…Among the failure mechanisms or defects which can appear during fabrication, defects occurring during the CMOS process can be distinguished from defects occurring during micromachining (Castillejo et al, 1998); (Mir et al, 2000); (Huang et al, 2012). Microelectronic and micromechanical components are created on the wafer during the CMOS process by means of a set of semiconductor, conductor and dielectric layers.…”
Section: Failure Mechanisms and Fault Classesmentioning
This work explores the fault injection problem in the particular case of an implantable capacitive microelectromechanical pressure sensor for blood-flow measurement applied to the detection of in-stent restenosis. In order to develop a MEMS testing method for this sensor and its related electronic circuitry, an accurate and realistic fault model is essential. A behavioural description of the equivalent capacitance in the fault-free case can be obtained from the analytical and numerical solutions of the deflection of a circular diaphragm under a uniformly distributed pressure. However, the deflection problem for faulty conditions due to, for example, contamination-based defects or partially released structures must be solved and modelled using finite-element analysis.
“…Among the failure mechanisms or defects which can appear during fabrication, defects occurring during the CMOS process can be distinguished from defects occurring during micromachining (Castillejo et al, 1998); (Mir et al, 2000); (Huang et al, 2012). Microelectronic and micromechanical components are created on the wafer during the CMOS process by means of a set of semiconductor, conductor and dielectric layers.…”
Section: Failure Mechanisms and Fault Classesmentioning
This work explores the fault injection problem in the particular case of an implantable capacitive microelectromechanical pressure sensor for blood-flow measurement applied to the detection of in-stent restenosis. In order to develop a MEMS testing method for this sensor and its related electronic circuitry, an accurate and realistic fault model is essential. A behavioural description of the equivalent capacitance in the fault-free case can be obtained from the analytical and numerical solutions of the deflection of a circular diaphragm under a uniformly distributed pressure. However, the deflection problem for faulty conditions due to, for example, contamination-based defects or partially released structures must be solved and modelled using finite-element analysis.
“…The sort of defects that can occur in these kind of structures can be determined from observations of failed devices. In [17] the most typical failure mechanisms in a bulk micromachining process are identified for each technology step together with the faults & deviating parameters caused by those mechanisms.…”
Section: Transducer Fault Modelling and Simulationmentioning
“…Layout of the sensor/actuator The sort of defects that can occur in these kind of structures can be determined from observations of failed devices. In [17] the most typical failure mechanisms in a bulk micromachining process are identified for each technology step together with the faults & deviating parameters caused by those mechanisms.…”
Section: Defect Descriptions and Statisticsmentioning
Efficient built-in and external test strategies are becoming essential in MicroElectroMechanical Systems (MEMS), especially for high reliability and safety critical applications. To be realistic however, internal and external test must be properly validated in terms of fault coverage. Fault simulation is hence likely to become a critical utility within the design flow. This paper will discuss methods for achieving test support based on the extension of tools and techniques currently being introduced into the mixed signal ASIC market.
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