Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Transistor models presented for SPICE are often evaluated by accuracy, with less consideration for the computational cost of model elements. In order to optimize models for application simulations, this research quantifies the relative simulation performance of modeling approaches and contextualizes the results with regard to accuracy. It is well established that the primary contributor to semiconductor dynamic behavior is the voltage-dependent interelectrode capacitances. Therefore, this study isolates these model components to resolve their influence on model accuracy and runtime. Both the voltage-dependencies modeled, and the mathematic formulation chosen strongly influence the accuracy of interelectrode capacitance models. In addition to these factors, the specific implementation chosen within SPICE also determines simulation performance. Through careful evaluation of these factors, this study offers specific recommendations for optimal implementations of interelectrode capacitances in SPICE.