Fast FPGA prototyping for real-time image processing with very high-level synthesis

Li, Chao; Bi, Yanjing; Marzani, Franck; Yang, Fan

doi:10.1007/s11554-017-0688-1

Cited by 6 publications

(8 citation statements)

References 50 publications

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“…In addition, the use of ASICs which offer more processing speed suffers from rigidity and expensive development. Indeed, adding a new functionality to a wired system will surely require a redesign of one or more ASICs and will increase cost [3]. The reconfigurable architectures represent an appropriate response, they offer better performance than programmable architectures and more flexibility than wired solutions.…”

Section: Introductionmentioning

confidence: 99%

“…The reconfigurable architectures represent an appropriate response, they offer better performance than programmable architectures and more flexibility than wired solutions. They use reconfigurable logic components that allow the user to modify the architecture after manufacturing it in a software way, unlike the ASIC whose algorithms are wired in silicon [2,3].…”

Section: Introductionmentioning

confidence: 99%

“…The invention of the FPGA made possible the concept of reconfigurable material hardware for video and image processing systems. The traditional design of video and image system architecture around the FPGA does not allow high productivity [3,4]. The latter can be improved by using a new design technique based on the Model Based Design (MBD) model [5].…”

Section: Introductionmentioning

confidence: 99%

“…Tools based on this technique are intended for embedded systems, the development of signal processing algorithms, the rapid integration of systems, and the analysis of the behavior of complex digital systems for a wide variety of cases. To resolve this constraint, many high level synthesis tools have been developed to take advantage of this technique to achieve FPGA rapid prototyping [3]. The FPGA with its great integration capabilities and reconfiguration is a key component in rapidly developing prototypes.…”

Section: Introductionmentioning

confidence: 99%

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Hardware Acceleration of Video Edge Detection with Hight Level Synthesis on the Xilinx Zynq Platform

Saidani

Ghodhbani

2022

Eng. Technol. Appl. Sci. Res.

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The study conducted in the current paper consists of validating an original design flow for the rapid prototyping of real-time image and video processing applications on FPGAs. A video application for edge detection with Simulink HDL coder and Vivado High-Level Synthesis (HLS) has been designed as if the code was going to be executed on a conventional processor. The developed tools will automatically translate the code into VHDL hardware language using an advanced compilation technique. This amounts to embedding processors on Xilinx Zynq-7000 System on-Chip (SoC) device in an optimal manner. This automated hardware design flow reduces the time to create a prototype since only the high-level description is required. The design of the video edge detection system is implemented on Xilinx Zynq-7000 platform. The result of the implementation gave effective resource utilization and a good frame rate (95 FPS) under 170MHz frequency.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Hardware Acceleration of Video Edge Detection with Hight Level Synthesis on the Xilinx Zynq Platform

Saidani

Ghodhbani

2022

Eng. Technol. Appl. Sci. Res.

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“…Some applications of advanced computer vision algorithms include video histogram, color conversion system that can be found in modern cameras and many video surveillance [3,4]. Although it might not be necessary to have live video processing capability for many applications, some applications such as color conversion and histogram equalization used for autonomous driving system would require an input stream from cameras to be processed at real time in order to send signals back to the powertrain and steering control unit to respond properly [5,6,7]. FPGAs are a good choice platform for real-time video processing because energy efficiency and the potential to extract highly-parallelized calculations [7,8].…”

Section: Introductionmentioning

confidence: 99%

Fast FPGA Prototyping based Real-Time Image and Video Processing with High-Level Synthesis

Ghodhbani¹,

Horrigue²,

Saidani³

et al. 2020

IJACSA

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Programming in high abstraction level is known by its benefits. It can facilitate the development of digital image and video processing systems. Recently, high-level synthesis (HLS) has played a significant role in developing this field of study. Real time image and video Processing solution needing high throughput rate are often performed in a dedicated hardware such as FPGA. Previous studies relied on traditional design processes called VHDL and Verilog and to synthesize and validate the hardware. These processes are technically complex and time consuming. This paper introduces an alternative novel approach. It uses a Model-Based Design workflow based on HDL Coder (MBD), Vision HDL Toolbox, Simulink and MATLAB for the purpose of accelerating the design of image and video solution. The main purpose of the present paper is to study the complexity of the design development and minimize development time (Time to market: TM) of conventional FPGA design. In this paper, the complexity of the development™ can be reduced by 60% effectively by automatically generating the IP cores and downloading the modeled design through the Xilinx tools and give more advantages of FPGA related to the other devices like ASIC and GPU.

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An FPGA-Based Hardware Accelerator for Real-Time Block-Matching and 3D Filtering

Wang

Jia

2020

IEEE Access

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Block-matching and 3D filtering (BM3D) denoising algorithm has been employed in many application fields because of its superior image processing quality. Due to the huge computational workload, real-time implementation of this algorithm is very challenging. Recently, studies on accelerating the BM3D algorithm on GPU have presented impressive speed up over CPU-based implementations. However, GPU devices are generally inefficient in energy dissipation and, thus, are not suitable for embedded application scenarios. In this paper, we propose a dedicated hardware accelerator design to efficiently boost the BM3D algorithm with reduced power consumption on FPGA device. The proposed design is based on a deeply pipelined OpenCL kernel architecture that can efficiently speed up the compute-intensive procedures of the denoising algorithm by exploiting the intrinsic parallelism and maximizing data reuse. The final design was implemented on Intel's Arria-10 GX1150 FPGA, and achieved an average 1.2× performance boost and an outstanding 8.3× reduction in energy dissipation when compared to a state-of-the-art GPU-based software design.

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Fast FPGA prototyping for real-time image processing with very high-level synthesis

Cited by 6 publications

References 50 publications

Hardware Acceleration of Video Edge Detection with Hight Level Synthesis on the Xilinx Zynq Platform

Hardware Acceleration of Video Edge Detection with Hight Level Synthesis on the Xilinx Zynq Platform

Fast FPGA Prototyping based Real-Time Image and Video Processing with High-Level Synthesis

An FPGA-Based Hardware Accelerator for Real-Time Block-Matching and 3D Filtering

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