Flexible hardware abstraction for wireless sensor networks

Handziski, Vlado; Polastre, Joseph; Hauer, Jan-Hinrich; Sharp, Cory; Wolisz, Adam; Culler, David

doi:10.1109/ewsn.2005.1462006

Cited by 51 publications

(23 citation statements)

References 10 publications

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“…The hardware adaptation phase made full use of the Hardware Abstraction Architecture (HAA) already developed at UC Berkeley and TU Berlin [9] with support for the MSP430 microcontroller. Our experience with this HAA has been very positive.…”

Section: Xe1205 Tinyos Radio Stackmentioning

confidence: 99%

TinyNode: a comprehensive platform for wireless sensor network applications

Dubois-Ferriere¹,

Meier²,

Fabre³

et al. 2006

2006 5th International Conference on Information Processing in Sensor Networks

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We introduce the TinyNode platform for wireless sensor networks. Supporting both research and industrial deployments, the platform offers communication ranges that exceed current platforms by a factor of 3 to 5, while consuming similar energy. It comes with a rich, practical set of hardware extensions and full TinyOS support. We describe the design choices of the TinyNode, the accompanying hardware modules, and the MAC layer implementation.

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Section: Xe1205 Tinyos Radio Stackmentioning

confidence: 99%

TinyNode: a comprehensive platform for wireless sensor network applications

Dubois-Ferriere¹,

Meier²,

Fabre³

et al. 2006

2006 5th International Conference on Information Processing in Sensor Networks

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“…NesC implements the hardware abstraction model of TinyOS, after which our layering is closely modeled [16]. NesC distinguishes three layers of hardware abstraction: a hardwareindependent layer (HIL), a hardware-abstraction layer (HAL), and a hardware-presentation layer (HPL).…”

Section: Nesc Layersmentioning

confidence: 99%

A unifying interface abstraction for accelerated computing in sensor nodes

Iyer

Zhang

Yang

et al. 2011

2011 Electronic System Level Synthesis Conference (ESLsyn)

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Hardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a lowpower FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the standby power dissipation. In this contribution, we present a methodology and tool to enable hardware/software codesign for sensor node application development. We present the integration of nesC, a sensornet programming language, with GEZEL, an easy-to-use hardware description language. We describe the hardware/software interface at different levels of abstraction: at the level of the design language, at the level of the co-simulator, and in the hardware implementation. We use a layered, uniform approach that is particularly suited to deal with the heterogeneous interfaces typically found on small embedded processors. We illustrate the strengths of our approach by means of a prototype application: the integration of a hardware-accelerated crypto-application in a nesC application.

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“…Our work on the MAC does not aim at producing hardware dependent code reused by different MAC protocols; we aim at breaking the influence of software constructs, supporting the MAC state machine execution, on higher layer processes' timing control and portability. In [16], a three-layer hardware abstraction architecture has been introduced with the objective of increasing portability and simplifying application development. Although such design facilitates the building of platform independent applications, abstraction of hardware intricacies needs to be conjugated with an abstraction of the underlying software system.…”

Section: Related Workmentioning

confidence: 99%

A Framework for Time-Controlled and Portable WSN Applications

Schoofs

Aoun

Stok

et al. 2010

Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering

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Abstract. Body sensor network applications require a large amount of data to be communicated over radio frequency. The radio transceiver is typically the largest source of power dissipation; improvements on energy consumption can thus be achieved by enabling on-node processing to reduce the number of packets to be transmitted. On-node processing is facilitated by a timely control over process execution to sequence operations on data; yet, the latter must be enabled while keeping highlevel software abstracted from both underlying software and hardware intricacies to accommodate portability to the wide range of hardware and software platforms. We investigated the challenges of implementing software services for on-node processing and devised constructs and system abstractions that integrate applications, drivers, time synchronization and MAC functionality into a system software which presents limited dependency between components and enables timely control of processes. We support our claims with a performance evaluation of the software tools implemented within the FreeRTOS micro-kernel.

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Flexible hardware abstraction for wireless sensor networks

Cited by 51 publications

References 10 publications

TinyNode: a comprehensive platform for wireless sensor network applications

TinyNode: a comprehensive platform for wireless sensor network applications

A unifying interface abstraction for accelerated computing in sensor nodes

A Framework for Time-Controlled and Portable WSN Applications

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