Formal verification of analog and mixed signal designs: A survey

Abstract

Analog and Mixed Signal (AMS) designs are an important part of embedded systems that link digital designs to the analog world. Due to challenges associated with its verification process, AMS designs require a considerable portion of the total design cycle time. In contrast to digital designs, the verification of AMS systems is a challenging task that requires lots of expertise and deep understanding of their behavior. Researchers started lately studying the applicability of formal methods for the verification of AMS systems as a way to tackle the limitations of conventional verification methods like simulation. This paper surveys research activities in the formal verification of AMS designs as well as compares the different proposed approaches.

Verifying inevitability of phase-locking in a charge pump phase lock loop using sum of squares programming

“…A survey of the formal verification of AMS circuits can be found in [17]. In [6], the author verified the 'time to locking' property for a digitally extensive PLL.…”

Modeling and verification of industrial flash memories

“…There has been recent interest in formal verification of analog designs [21], although we are not aware of any approach at abstracting analog circuits through parameterized behavioral models. There has been recent applications of equivalence checking on analog designs by digitization of infinite analog state space [22], [23], [24], and model checking by extending temporal logic to capture analog properties [25], [26].…”

Integrating Abstraction Techniques for Formal Verification of Analog Designs

“…In contrast, we propose in this paper qualitative-based methods for the construction and verification of abstract models, which overcome the time bound requirement. A detailed literature overview of analog formal verification can be found in [23]. ¶ We use a simple refinement procedure based on interval methods for ODEs that identifies and eliminates the spurious counterexamples, however, its description is outside the scope of this paper.…”