This paper reports the development of a proof strategy that integrates the MetiTarski theorem prover as a trusted external decision procedure into the PVS theorem prover. The strategy automatically discharges PVS sequents containing real-valued formulas, including transcendental and special functions, by translating the sequents into first order formulas and submitting them to MetiTarski. The new strategy is considerably faster and more powerful than other strategies for nonlinear arithmetic available to PVS.

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The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical behaviors. In this paper, we propose a qualitative-based predicate abstraction method for the verification of a class of nonlinear analog circuits. In the proposed method, system equations are automatically extracted from a circuit diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver, SMV, and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples including Colpitts and tunnel diode oscillators.

Analog circuits are an increasingly critical component in embedded system designs. Traditionally, simulation is used for verification, but due to the infinite state space of analog components, the 100% correctness of a design cannot be guaranteed. Formal methods, based around applying mathematical expressions and reasoning to prove correctness, have been developed to increase the verification confidence level. This paper introduces and demonstrates a methodology for formally verifying safety properties of analog circuits. In the proposed approach, system equations are automatically extracted from a SPICE netlist by means of energy conservative bond graph models. Verification based on abstract model checking and constraint solving is then applied on the extracted equation models. Our methodology avoids an exhaustive and time demanding simulation that is normally encountered during analog circuit verification. To this end, we have used a set of tools to implement the proposed verification flow and applied it on tunnel diode, Chua and Colpitts oscillators as case studies.